Market Size (2025)
$385.00M
Vertical: SEMIBase Year: 2025
Market Size (2025)
$385.00M
Projected (2032)
$987.90M
CAGR (2022–2032)
14.5%
Key Players
10+
Market Overview
The global EUV photoresists market covers the light-sensitive patterning materials that are coated or deposited onto silicon wafers and exposed in extreme ultraviolet (EUV) lithography scanners operating at a wavelength of 13.5 nm. These materials define the most critical features of leading-edge logic and memory devices, including gate, contact, via and tight-pitch metal layers at the 7 nm class and below, and the bit-line, storage-node and periphery layers of advanced DRAM. Because EUV scanners are now the production standard for every leading-edge foundry, logic integrated device manufacturer (IDM) and DRAM maker, consumption of EUV resists rises with two variables: the number of EUV-exposed wafers and the number of EUV layers patterned on each wafer.
The market was valued at USD 0.385 Billion in 2025 and is projected to reach USD 0.988 Billion by 2032, expanding at a compound annual growth rate (CAGR) of 14.1% over 2026–2032. This represents an absolute increase of USD 0.603 Billion between 2025 and 2032, meaning the market will add more value over the forecast period than its entire 2025 size. Growth over the historic period was uneven: the market moved from USD 0.254 Billion in 2022 to USD 0.270 Billion in 2023, when memory makers cut wafer starts during the inventory correction, before rising to USD 0.326 Billion in 2024 as DRAM production recovered and 3 nm logic volumes increased. From the 2025 base, the forecast reflects the ramp of 2 nm gate-all-around (GAA) logic, the insertion of more EUV layers into 1c-class and later DRAM generations, and the first production use of High-NA EUV scanners later in the decade.
The value of this market is small relative to the semiconductor devices it enables, but its strategic weight is considerable. A single EUV resist formulation must deliver resolution, line-width roughness and sensitivity within extremely narrow windows, is qualified layer by layer at each chipmaker, and is supplied by a short list of producers concentrated in Japan. These features make the market technically demanding, slow to change suppliers and closely watched by governments that now treat lithography materials as part of national semiconductor security.
Key Findings
By resist type, Chemically Amplified Resists (CAR) form the largest segment, accounting for 74.0% of the market in 2025 with a value of USD 0.285 Billion. CAR platforms remain the qualified incumbent on most EUV layers because they were adapted from the 193 nm immersion chemistries already understood by fabs, and they continue to be extended to new nodes. Metal Oxide Resists (MOR) are the fastest-growing resist type, with a CAGR of 23.0% over 2026–2032, rising from USD 0.069 Billion in 2025 to USD 0.296 Billion in 2032. Their stronger EUV absorption and etch resistance suit the thinner films and tighter pitches of 2 nm-class logic, advanced DRAM and High-NA patterning. Dry-Deposited & Hybrid Resists, valued at USD 0.031 Billion in 2025, grow at 21.1% as vapour-deposited resist processes move from pilot use into DRAM production.
By technology node, the 5 nm / 4 nm segment is the largest, holding 38.0% of the market in 2025 at USD 0.146 Billion, reflecting the very large installed base of smartphone, PC and data-centre processors manufactured on these nodes. The 2 nm & Below (incl. High-NA) segment is the fastest-growing node category, with a CAGR of 33.7%, increasing from USD 0.046 Billion in 2025 to USD 0.370 Billion in 2032. On these values, 2 nm & Below becomes the largest node segment by 2032, overtaking both the 3 nm segment (USD 0.262 Billion in 2032) and the 5 nm / 4 nm segment (USD 0.232 Billion in 2032).
By end user, Foundries are the largest segment, accounting for 61.0% of 2025 demand at USD 0.235 Billion, because contract manufacturers run the highest volume of EUV wafers at the leading edge. Memory Manufacturers (DRAM / HBM) are the fastest-growing end user, with a CAGR of 16.5%, rising from USD 0.104 Billion in 2025 to USD 0.306 Billion in 2032, as each new DRAM generation adds EUV layers and as high-bandwidth memory (HBM) for AI accelerators increases DRAM wafer demand. Logic IDMs grow at 15.5% from a 2025 base of USD 0.046 Billion.
By region, Asia Pacific is the leading region with a 78.2% share in 2025 and a value of USD 0.301 Billion, reflecting the concentration of EUV-based logic and DRAM production in Taiwan, South Korea and Japan. North America is the fastest-growing region, with a CAGR of 18.5%, increasing from USD 0.060 Billion in 2025 to USD 0.198 Billion in 2032 as new leading-edge fabs in the United States ramp. At country level, the Rest of Asia Pacific grouping, which covers markets outside China, India and Japan, is the largest entry with USD 0.260 Billion in 2025, equal to 67.4% of the global market. The U.S. is the largest individually named country at USD 0.058 Billion in 2025. India is the fastest-growing country, with a CAGR of 24.7% over 2026–2032.
Segmentation Summary
The market is analysed across three product and application segmentations, resist type, technology node and end user, together with a regional and country breakdown. Across these dimensions a consistent pattern emerges: the segments that dominate today are tied to the established chemistry and to the nodes already in high-volume production, while the fastest growth is concentrated in the newer chemistries and in the 2 nm-class and High-NA generation. Table 1.1 summarises the largest and fastest-growing segment in each segmentation.
The summary also highlights a structural shift in the mix of demand. CAR retains a majority position through 2032, but its share is expected to narrow as MOR and dry-deposited materials capture a larger proportion of new layers at advanced nodes. Similarly, demand moves away from the 7 nm / 6 nm and 5 nm / 4 nm generations, whose volumes are mature, toward 3 nm and especially 2 nm & Below. On the end-user side, memory manufacturers gain share from foundries, reflecting the faster increase in EUV layer counts in DRAM than in logic over the forecast period.
Regional and Country Highlights
Asia Pacific remains the centre of gravity of the market throughout the forecast period. Its value rises from USD 0.301 Billion in 2025 to USD 0.715 Billion in 2032, an absolute increase of USD 0.414 Billion. Within the region, the Rest of Asia Pacific grouping accounts for 86.2% of 2025 regional demand, since it contains the two largest concentrations of EUV production in the world: foundry and DRAM manufacturing in Taiwan and South Korea. Japan, valued at USD 0.029 Billion in 2025, is both a consumer and the principal producing country for EUV resists, and its demand grows at 16.8% as Rapidus brings its 2 nm pilot line toward production and Micron adds EUV-based DRAM capacity in Hiroshima. China, at USD 0.011 Billion in 2025, grows at 18.9%, with demand tied mainly to research, materials development and qualification work because export controls prevent the shipment of EUV scanners to the country. India grows fastest of all countries at 24.7%, from a very small base, as its first 300 mm fab project and supporting research programmes develop.
North America's growth reflects the construction of leading-edge capacity in the United States. The U.S. accounts for 97.1% of North American demand in 2025 and grows at 18.6%, supported by TSMC's Arizona fabs, Intel's 18A and 14A programmes, Samsung's Taylor, Texas fab and memory investments by Micron. Canada and Mexico together account for a small balance of regional demand, linked mainly to research activity and supply-chain functions.
Europe was valued at USD 0.018 Billion in 2025 and grows at 17.5% to USD 0.055 Billion in 2032. Demand in Europe is concentrated in the Rest of Europe grouping, which held 61.9% of the regional market in 2025 and includes the EUV development ecosystem around ASML and imec in the Netherlands and Belgium as well as Intel's EUV-based production in Ireland. Germany and France follow, supported by research institutes, tool and optics suppliers and specialty chemical producers. Latin America (USD 0.003 Billion in 2025) and the Middle East & Africa (USD 0.004 Billion in 2025) remain small, but both grow faster than the global average, at 16.4% and 17.3% respectively, as semiconductor programmes in Brazil, Saudi Arabia, the UAE and other markets build research and design capability.
Competitive Landscape Summary
The EUV photoresists market is highly consolidated. Three Japanese producers, JSR Corporation (including its U.S. subsidiary Inpria), Tokyo Ohka Kogyo (TOK) and Shin-Etsu Chemical, supply the majority of qualified EUV resist volume and hold long-standing positions on critical layers at the leading foundries and memory makers. A second group of established materials companies, comprising Fujifilm, Sumitomo Chemical and Qnity Electronics (the former DuPont electronics business, which became independent on 1 November 2025), competes for qualification on specific layers and at specific customers. Lam Research participates through a different model: its Aether dry resist technology, selected in January 2025 as the production tool of record for advanced DRAM at a leading memory manufacturer, combines deposition and development equipment with metal-organic precursors. Niche participants include Merck KGaA, which supplies EUV ancillary materials such as rinse and underlayer products, Dongjin Semichem, which has supplied EUV resist to Samsung as part of South Korea's materials localisation effort, and Irresistible Materials, a UK developer of molecular EUV resists that received a strategic investment from TOK in February 2026.
Competition is fought through qualification rather than price. Suppliers invest in their own EUV exposure and inspection capacity, in production sites close to customers and in partnerships that link resist chemistry with deposition, etch and filtration. Recent examples include JSR's metal oxide resist plant in Ochang, South Korea, completed on 30 September 2026, its Taiwan manufacturing joint venture with LCY Chemical and Wah Lee Industrial established in April 2026, the cross-licensing agreements between JSR/Inpria and Lam Research (September 2025) and between JSR/Inpria and Entegris (May 2026), and TOK's new photoresist and high-purity chemical plant in Pyeongtaek, South Korea, where construction began in August 2025. Ownership is also changing: in November 2026, Reuters reported that Japan Investment Corporation plans to sell JSR to Mitsui Chemicals.
Challenges and Opportunities
The central technical challenge in this market is stochastic patterning failure. At EUV wavelengths, each exposure involves relatively few photons, and random variations in photon absorption and chemical reaction produce line-width roughness, missing contacts and bridging defects. Resist suppliers must improve resolution and roughness without raising the exposure dose, because higher doses reduce scanner throughput and raise the cost of each wafer. This trade-off lengthens qualification cycles and limits how quickly new chemistries can replace incumbents.
A second set of challenges relates to regulation and trade. Many CAR formulations rely on fluorinated photoacid generators and surfactants that fall within the definition of per- and polyfluoroalkyl substances (PFAS). In the European Union, the Committee for Risk Assessment adopted its opinion on the proposed universal PFAS restriction in March 2026, and the Committee for Socio-Economic Analysis is working toward a final opinion by the end of 2026. In the United States, the start of the TSCA section 8(a)(7) PFAS reporting period was postponed in April 2026. Trade tensions add further risk: the concentration of EUV resist production in Japan, export controls on advanced semiconductor technology and the escalation of Japan–China trade frictions in late 2025 and early 2026 have made supply security a board-level concern for chipmakers.
The opportunities are equally specific. High-NA EUV requires thinner resist films and stronger EUV absorption, which favours MOR and dry-deposited chemistries and opens room for new qualifications. The construction of leading-edge fabs in the United States, Japan, South Korea and Taiwan is pulling resist finishing, quality control and technical support closer to customers, which creates openings for suppliers that localise quickly. Chipmakers' interest in second sources, and the development of PFAS-free resist and ancillary chemistries, also give challengers and specialist developers a route into a market that has historically been difficult to enter.
Future Outlook
The forecast indicates that the global EUV photoresists market will more than double between 2025 and 2032. The years 2026 and 2027 are expected to be shaped by the ramp of 2 nm-class logic at TSMC, Samsung and Intel, the conversion of DRAM capacity to 1c and later generations, and the start of production at new fabs in Arizona, Texas, Hokkaido and Hiroshima. From 2028 onward, the market's growth is expected to depend increasingly on High-NA EUV: Intel has tied High-NA to its 14A process, SK hynix and Samsung have installed production-grade EXE:5200B systems, and TSMC was reported in September 2026 to be targeting High-NA introduction into high-volume manufacturing in 2030.
Across this period the composition of the market is expected to shift. By 2032, MOR is expected to account for 30.0% of the market and the 2 nm & Below node category for 37.5%, compared with 18.0% and 12.0% respectively in 2025. Memory manufacturers are expected to account for 31.0% of demand in 2032, up from 27.0% in 2025. Suppliers that combine qualified CAR positions with production-ready MOR or dry resist platforms, localised manufacturing near the main fab clusters and credible responses to PFAS regulation are best placed to capture this growth.
The EUV Photoresists Market market is projected to grow at a CAGR of 14.5% from 2022 to 2032.
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View Subscription PlansDefinition
EUV photoresists are radiation-sensitive materials used to transfer circuit patterns from a reflective photomask onto a semiconductor wafer in extreme ultraviolet lithography. An EUV scanner generates light at a wavelength of 13.5 nm by striking droplets of molten tin with a high-power carbon dioxide laser, collects that light with multilayer mirrors and projects the mask pattern onto a resist film a few tens of nanometres thick. Where the resist absorbs EUV photons, it undergoes a chemical change that alters its solubility or its resistance to etching. After development, the remaining resist pattern serves as a temporary mask for the etch or implant step that defines the permanent device structure. Because current EUV scanners can resolve features close to 13 nm in a single exposure with 0.33 numerical aperture optics, and roughly 8 nm with 0.55 numerical aperture (High-NA) optics, the resist must hold its shape, edge quality and dimensions at a scale where only a few hundred molecules span a line.
EUV light behaves differently from the deep ultraviolet (DUV) light used in earlier lithography generations, and this difference shapes resist design. An EUV photon carries about 92 electronvolts, roughly fourteen times the energy of a 193 nm photon, so each exposure delivers far fewer photons for the same dose. Absorbed photons generate photoelectrons and secondary electrons, and it is these electrons, travelling a few nanometres through the film, that trigger most of the chemistry. The small number of photons, the random path of electrons and the molecular structure of the resist together produce stochastic variation, which appears as line-edge and line-width roughness, local critical-dimension variation and random defects such as missing contacts or microbridges. Resist chemists therefore work within a three-way trade-off between resolution, roughness and sensitivity, commonly referred to as the RLS trade-off. Improving one parameter usually worsens another unless the underlying chemistry changes.
In production, an EUV resist passes through a closely controlled sequence of steps on a coat-and-develop track linked to the scanner. The wafer is first prepared with an underlayer or adhesion layer, after which the liquid resist is dispensed and spun to a uniform film, or, in the case of dry resist, deposited from the vapour phase. A post-apply bake removes residual solvent and stabilises the film. The wafer is then exposed in the scanner under vacuum, since EUV light is absorbed by air. After exposure, a post-exposure bake drives the chemical reactions that define the latent image, and the wafer is developed to remove either the exposed or the unexposed regions, depending on whether the resist is positive-tone or negative-tone. A rinse step follows, often with a specially formulated rinse solution that reduces the surface tension forces responsible for pattern collapse. The patterned resist is then inspected and measured before the wafer moves to etch. The performance of a resist is usually summarised by a small set of parameters: the exposure dose required to print the target dimension, expressed in millijoules per square centimetre; the smallest pitch and dimension it can resolve; its line-edge or line-width roughness; its local critical-dimension uniformity; its defect density; and its etch resistance during pattern transfer.
EUV lithography moved from development to high-volume manufacturing in 2019, when it was first used on a limited number of layers in 7 nm-class logic production. Since then, its use has spread to all leading-edge logic nodes and to advanced DRAM, and the resist products used have evolved from adapted DUV chemistries toward materials designed specifically for EUV absorption and secondary-electron chemistry. This history explains the present structure of the market, in which chemically amplified resists hold the majority of qualified layers while newer chemistries are being introduced on the most demanding layers of the newest nodes.
Three families of EUV resist are in use or approaching production. Chemically amplified resists (CAR) are polymer-based materials in which a photoacid generator (PAG) releases acid on exposure, and the acid then catalyses a cascade of deprotection reactions during a post-exposure bake. This amplification gives CAR high sensitivity, and its chemistry is well understood from DUV lithography, but acid diffusion blurs the image and limits roughness performance at the tightest pitches. CAR is supplied in positive-tone versions, developed in aqueous tetramethylammonium hydroxide (TMAH), and negative-tone versions developed in organic solvents. Metal oxide resists (MOR) are non-chemically amplified materials built from metal-oxo clusters, most commonly tin-based, surrounded by organic ligands. Metals such as tin absorb EUV light several times more strongly than carbon-based polymers, so a thinner MOR film can capture the same number of photons, and the inorganic core provides high etch resistance. MOR is typically spin-coated and developed in organic solvent, and it has become the leading candidate for tight-pitch metal and DRAM layers. Dry-deposited and hybrid resists are formed from vapour-phase metal-organic precursors in a deposition chamber rather than by spin-coating, and in some cases are developed in a dry plasma or gas-phase step rather than in liquid developer. Lam Research's Aether platform is the best-known example. Hybrid formulations that combine organic and inorganic components, or that introduce new reaction mechanisms such as multi-trigger chemistry, are included in this category where they are positioned for EUV production.
For the purposes of this study, the EUV photoresists market includes all resist materials designed, qualified and sold for exposure in EUV lithography scanners in semiconductor manufacturing and associated process development, across the three resist types described. Value is measured at the level of resist material sold to device manufacturers, including the precursor chemistries supplied specifically to form dry-deposited resist films. The market covers resist consumed in high-volume manufacturing, in pilot and development lines operated by chipmakers, and in research consortia and institutes where materials are qualified for future production.
The study excludes photoresists designed for DUV exposure at 248 nm (KrF) and 193 nm (ArF dry and immersion), i-line and g-line resists, electron-beam resists used for mask writing, nanoimprint resists and thick-film resists used in advanced packaging. It also excludes EUV ancillary materials sold separately from the resist itself, such as underlayers, bottom anti-reflective layers, spin-on carbon and hard masks, developers, rinse solutions and edge-bead removers, as well as EUV photomask blanks, pellicles and lithography equipment. Where a supplier sells a resist together with a matched developer or rinse, only the resist component is counted. Equipment revenue from dry resist deposition and development tools is excluded; only the consumable precursor chemistry that becomes the resist film is included.
The economic character of the product also helps define the market. EUV resists are consumed in very small physical quantities relative to other semiconductor chemicals, because each wafer receives only a few millilitres of resist per coat and most of the dispensed volume is spun off the wafer. Their value, however, is high per unit volume, reflecting the cost of molecular design, ultra-high-purity synthesis and filtration, EUV-based quality testing and on-site technical support. Products are typically developed for a specific layer at a specific customer and node, so a supplier's portfolio consists of many closely related formulations rather than a few standard grades. This makes the market a specialty business in which revenue depends on the number and importance of qualified positions rather than on bulk volume.
The demand base for EUV photoresists is narrow and well defined. EUV lithography is used commercially by leading-edge foundries, by logic IDMs that manufacture their own processors, and by DRAM makers, including those producing the DRAM dies stacked in HBM. NAND flash, mature-node logic, analogue, power and most specialty devices do not use EUV lithography and therefore do not consume EUV resists. This concentration means that market demand follows the investment and utilisation plans of a small number of chipmakers, and that each qualification decision by one of them can shift supplier positions materially. It also means that the market is closely linked to developments in EUV equipment. The supply of EUV scanners by ASML, the introduction of higher-power light sources and the arrival of High-NA systems all influence how many wafers are exposed with EUV light and which resist properties are most valued. Resist suppliers therefore follow equipment roadmaps closely and participate in joint development programmes with ASML, research institutes and chipmakers well before a new scanner generation enters production.
Scope of the Study
This study analyses the global EUV photoresists market across three segmentations, taken directly from the market data used for the analysis. By resist type, the market is divided into Chemically Amplified Resists (CAR), Metal Oxide Resists (MOR) and Dry-Deposited & Hybrid Resists. By technology node, it is divided into 7 nm / 6 nm, 5 nm / 4 nm, 3 nm, and 2 nm & Below (incl. High-NA), where each category refers to the logic process generation or equivalent DRAM generation at which the resist is consumed. By end user, it is divided into Foundries, Logic IDMs and Memory Manufacturers (DRAM / HBM).
The geographic scope comprises five regions and their constituent countries. North America covers the U.S., Canada and Mexico. Europe covers Germany, the U.K., France, Italy, Spain and the Rest of Europe. Asia Pacific covers China, India, Japan and the Rest of Asia Pacific, the latter grouping including the major EUV production locations in Taiwan and South Korea as well as other regional markets. Latin America covers Brazil, Argentina and the Rest of Latin America. The Middle East & Africa covers the UAE, Saudi Arabia, South Africa and the Rest of MEA. For each region and country, the market is further analysed by resist type, technology node and end user.
The end-user categories are defined by the business model of the consuming company. Foundries are contract manufacturers that produce chips designed by other companies, including TSMC, Samsung Foundry, Intel Foundry when manufacturing for external customers, and Rapidus. Logic IDMs are integrated device manufacturers that design and manufacture their own logic products, principally Intel for its processors. Memory Manufacturers (DRAM / HBM) are producers of dynamic random-access memory, including the DRAM dies used in high-bandwidth memory stacks, principally Samsung Electronics, SK hynix and Micron Technology. Where a company operates in more than one category, its consumption is allocated according to the products manufactured on each EUV layer. The technology node categories refer to the process generation of the wafers on which resist is consumed. For DRAM, the most advanced 10 nm-class generations are mapped to the node categories according to the patterning requirements of their EUV layers, so that demand for the newest DRAM generations contributes to the 3 nm and 2 nm & Below categories. The 2 nm & Below (incl. High-NA) category also includes all consumption on High-NA EUV scanners, whether for logic or memory, in development or in production.
The study period spans 2022 to 2032. The years 2022, 2023 and 2024 are treated as historic years, 2025 is the base year, and 2026 to 2032 is the forecast period. Growth rates are expressed as compound annual growth rates over 2026–2032. All market values are presented in USD Billion, and market shares refer to the base year 2025 unless stated otherwise. The competitive analysis covers the leading resist producers and technology providers active in the market, with emphasis on developments from 2022 onward. It includes established chemical companies that formulate and sell liquid resists, equipment companies that supply dry resist technology together with its precursor chemistry, and specialist developers whose products are in qualification. The study also examines the value chain that supports resist production, the regulatory frameworks that govern the chemicals used and the trade measures that affect cross-border supply, as these factors shape both the cost and the availability of EUV resists in each region.
Research Objectives
The study was designed to meet the following objectives, each tied to the specific characteristics of the EUV resist supply chain and its customers.
To estimate the size of the global EUV photoresists market for 2022–2025 and forecast it for 2026–2032 in USD Billion, by resist type, technology node, end user, region and country, using an approach that links resist consumption to EUV wafer exposures and layer counts.
To assess how the transition from chemically amplified resists toward metal oxide and dry-deposited resists will change demand by layer type and by customer group over the forecast period, and to identify the layers and customers where the new chemistries are likely to be adopted first.
To evaluate how the ramp of 3 nm and 2 nm-class logic, the increase in EUV layers per DRAM generation and the introduction of High-NA EUV scanners affect resist consumption at each technology node, including the role of EUV double patterning on the tightest layers.
To identify the drivers, restraints, opportunities and trends specific to EUV resists, including stochastic defectivity, qualification cycles, PFAS regulation and export controls, and to assess their relative weight over the forecast period.
To analyse the EUV resist value chain from photoacid generators, polymers, solvents and metal-organic precursors through formulation, filtration and qualification to delivery at the fab, identifying the stages where value and supply risk are concentrated.
To map regional demand against the location of EUV-based fab capacity and supplier production sites, including new investments in the United States, Japan, South Korea, Taiwan and India, and to explain the demand drivers in countries without volume EUV production.
To profile the competitive structure of the market through supplier positioning, a competitor dashboard and a record of verified developments from 2022 to 2026, covering liquid resist producers, dry resist technology providers and specialist developers.
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View Subscription PlansOverview of the Research Process
The research process for the global EUV photoresists market was built around a central difficulty of this industry: the market is small in value, highly concentrated among a few suppliers and customers, and surrounded by commercial confidentiality. Resist formulations are proprietary, qualification results are rarely disclosed, and suppliers do not report EUV resist revenue as a separate line item. A reliable estimate therefore cannot rest on any single source. The research combined desk research on the semiconductor manufacturing base and the materials suppliers, structured interviews with participants across the supply chain, and quantitative modelling that links resist consumption to the physical activity that drives it, namely EUV wafer exposures.
The process was organised in five stages. The first stage defined the market boundaries, separating EUV resists from DUV resists, ancillary materials and equipment, and fixing the three segmentations of resist type, technology node and end user. The second stage gathered secondary data on EUV scanner installations, fab capacity, process roadmaps, supplier financial disclosures and regulatory developments. The third stage tested and refined this information through primary interviews. The fourth stage built the market model using both bottom-up and top-down methods and reconciled the results through triangulation. The fifth stage produced the forecast for 2026–2032, applying growth assumptions to each segment, region and country, followed by internal review for consistency between segmentations and across geographies.
Throughout the process, particular attention was paid to timing. EUV resist demand responds to node transitions that occur on roughly two- to three-year cycles, to memory market cycles that can change wafer starts within a few quarters, and to policy events such as export controls and subsidy decisions. The research therefore gave priority to information published in 2025 and 2026, and older information was used only where it established a fact that remains valid, such as the date of a plant investment or the year a technology was first introduced into production.
Secondary Research
Secondary research drew on several categories of sources relevant to this specific industry. Industry associations provided data and context on semiconductor production and materials demand, including SEMI and its materials market reports and standards activity, the Semiconductor Industry Association in the United States, the Japan Electronics and Information Technology Industries Association, the Korea Semiconductor Industry Association, the Taiwan Semiconductor Industry Association and the European Semiconductor Industry Association. These sources were used to track wafer fab equipment spending, fab construction and regional production patterns.
Government and regulatory bodies provided information on industrial policy, trade and chemical regulation. Sources included Japan's Ministry of Economy, Trade and Industry for subsidy programmes and export control rules, South Korea's Ministry of Trade, Industry and Resources (named the Ministry of Trade, Industry and Energy until October 2025) for materials localisation and foreign investment announcements, the U.S. Department of Commerce and its Bureau of Industry and Security for CHIPS Act incentives, Section 232 actions and export controls, the U.S. Environmental Protection Agency for TSCA PFAS reporting, the European Chemicals Agency for the REACH PFAS restriction process, and the European Commission for the Chips Act and the June 2026 Chips Act 2.0 proposal. National customs and trade statistics were used to understand flows of photographic and photoresist chemical preparations between Japan, South Korea, Taiwan, the United States and Europe, recognising that customs classifications do not separate EUV resists from other resist types.
Company filings formed a major input. Annual reports, integrated reports, securities filings and investor presentations of resist and materials suppliers, including Tokyo Ohka Kogyo, Shin-Etsu Chemical, Fujifilm Holdings, Sumitomo Chemical, Qnity Electronics, Merck KGaA, Dongjin Semichem, Entegris and Lam Research, were reviewed for segment revenue, capacity investments and product commentary. Disclosures by JSR before its delisting in 2024, together with its subsequent press releases, were also used. On the demand side, filings and earnings materials of TSMC, Samsung Electronics, SK hynix, Micron Technology and Intel were analysed for capital expenditure, node ramp schedules and EUV adoption, and ASML's annual reports and quarterly results were used to track EUV and High-NA EUV system shipments.
Technical and trade literature was used to understand chemistry and adoption. This included proceedings of the SPIE Advanced Lithography + Patterning conference and the SPIE Photomask Technology + EUV Lithography conference, publications from imec, CEA-Leti and the Albany NanoTech Complex, and journals covering micro- and nanopatterning. Trade publications covering the semiconductor supply chain in Japan, Taiwan, South Korea, the United States and Europe were used to follow plant announcements, qualification news and policy developments. Commercial databases of company financials, trade flows and fab capacity supplemented these sources.
Primary Research
Primary research was used to validate secondary findings, fill gaps where public information was absent and test the assumptions behind the market model. Interviews followed a semi-structured format, with a common set of questions adapted to each respondent's role, and were conducted by telephone, video conference and written questionnaire. Respondents were assured that their individual inputs would be used only in aggregated form.
On the supply side, respondents included product managers, business development staff and technical marketing personnel at EUV resist producers, suppliers of photoacid generators, polymers, monomers and quenchers, producers of tin and other metal-organic precursors used in metal oxide and dry-deposited resists, providers of ultra-high-purity solvents and filtration systems, and distributors serving fabs in Taiwan, South Korea and the United States. Equipment-side respondents included specialists in coat-and-develop track systems, deposition and etch tools for dry resist processes, and EUV exposure and metrology.
On the demand side, respondents included lithography process engineers, patterning integration engineers, materials procurement managers and supply-chain risk specialists at foundries, logic IDMs and DRAM manufacturers, as well as researchers at institutes and consortia that run EUV and High-NA EUV development lines. Additional input came from independent consultants and former industry executives with experience in resist development and fab operations.
The objectives of primary research were specific. Interviews sought to establish typical resist volumes consumed per EUV layer and per wafer, the relative pricing of CAR, MOR and dry resist materials, the number of EUV layers by node and by DRAM generation, the expected timing of MOR and dry resist insertion and of High-NA production, the qualification status of suppliers at major customers, the effect of PFAS regulation on formulation plans, and the regional distribution of resist consumption, including demand generated by pilot lines and research facilities outside the main production countries. Where respondents disagreed, for example on the pace of metal oxide resist adoption in logic or the timing of High-NA production, follow-up interviews were used to understand the reasons for the difference, and the forecast reflects a central view supported by the balance of evidence.
Market Size Estimation
Market size was estimated using a bottom-up approach and a top-down approach, and the results were reconciled through data triangulation.
The bottom-up approach starts from physical consumption. For each major EUV-using fab and for each technology node, the model estimated EUV wafer starts, using capacity disclosures, scanner installations and utilisation assumptions. Each node and DRAM generation was assigned an average number of EUV-exposed layers, with layers further divided by likely resist type, since contact and via layers, line-space metal layers and DRAM periphery or storage-node layers favour different chemistries. Resist volume per exposed layer was estimated from typical dispense volumes, coating efficiency and rework rates, adjusted for the thinner films used at advanced nodes. Volumes were multiplied by average selling prices for each resist type, derived from interviews and supplier commentary, to arrive at value. Dry-deposited resist value was estimated from the consumption of precursor chemistry per wafer pass rather than from liquid dispense volumes. Demand from pilot lines and research facilities was added separately, as these sites consume resist in small volumes across many evaluation runs.
The top-down approach starts from supplier revenue. Photoresist and electronic materials revenues reported by the leading suppliers were collected, and the portion attributable to EUV resists was estimated using company commentary, product mix information and interview input. This was cross-checked against the EUV scanner installed base, using ASML's reported shipments, and against wafer fab equipment spending at EUV-using customers. The resulting total was allocated across resist types, nodes, end users and geographies using the shares derived from the bottom-up model and from customer and supplier interviews.
Data triangulation compared the two estimates at the global level and for each segmentation. Where differences arose, the underlying assumptions were reviewed, for example the number of EUV layers at a given DRAM generation or the share of a supplier's revenue attributable to EUV, and the model was adjusted until the two approaches converged within an acceptable range. Final values were also checked for internal consistency, so that each segmentation sums to the same total and each region equals the sum of its countries.
Forecasting Methodology
The forecast for 2026–2032 was built segment by segment and region by region rather than by applying a single growth rate to the total market. Each forecast reflects the specific factors that determine EUV resist consumption in that segment.
Factors considered include the announced and expected timing of node introductions at TSMC, Samsung, Intel and Rapidus; the ramp schedules of new EUV-based fabs in Taiwan, South Korea, Japan and the United States; the number of EUV layers per wafer at each node and DRAM generation; expected shipments of 0.33 NA and 0.55 NA EUV scanners; the rate at which MOR and dry-deposited resists replace CAR on specific layers; changes in average selling prices as volumes increase and as new chemistries mature; demand for DRAM and HBM linked to AI data-centre investment; and the effect of regulatory and trade developments, including PFAS restrictions and export controls.
The forecasting approach combined time-series analysis of the historic period with driver-based modelling. For each segment, the base-year value was projected using expected changes in wafer starts, layer counts and resist mix, with adoption curves used for the newer resist types and for High-NA EUV. The 7 nm / 6 nm and 5 nm / 4 nm segments were modelled as mature, with growth tied mainly to sustained volumes, while 3 nm and 2 nm & Below were modelled on ramp curves aligned to capacity announcements. Regional and country forecasts were linked to the location of fab capacity and research activity. Forecasts were reviewed with industry experts and adjusted where their input indicated that a timeline or adoption rate was unrealistic.
Base Year and Forecast Period
The base year of the study is 2025, the most recent full year for which supplier disclosures, customer capacity data and EUV scanner shipment information are available. Historic data is presented for 2022, 2023 and 2024, a period that includes the 2023 memory downturn and the subsequent recovery driven by AI-related demand. The forecast period is 2026 to 2032, and growth rates are expressed as compound annual growth rates over 2026–2032.
All values are expressed in USD Billion at current prices. Revenues reported by suppliers in Japanese yen, South Korean won, euros or other currencies were converted to U.S. dollars using annual average exchange rates for the relevant year. Forecast values do not attempt to predict future currency movements and are expressed in U.S. dollar terms consistent with the base year.
The choice of 2025 as the base year has particular significance for this market. It is the first year in which 2 nm-class logic entered volume production at more than one chipmaker, in which production-grade High-NA EUV scanners were installed at customer sites, and in which a dry resist process was confirmed as the production tool of record for advanced DRAM. Using 2025 as the base therefore captures the starting point of the technology transitions that shape the forecast. The seven-year forecast period was selected because it spans roughly three node generations in logic and four to five DRAM generations, long enough to reflect the adoption of High-NA EUV and of new resist chemistries, while remaining within the planning horizon of chipmakers' published roadmaps and announced fab projects.
Assumptions and Limitations
The forecast rests on several assumptions. Leading-edge chipmakers are assumed to broadly follow their publicly communicated node and capacity roadmaps, allowing for the delays that have historically affected new fabs. The current export control regime is assumed to remain in place, so that EUV scanners continue not to be shipped to China. No prolonged disruption to resist production in Japan, South Korea or Taiwan is assumed. PFAS restrictions under consideration in the European Union are assumed to include transition periods or derogations for semiconductor manufacturing uses that allow orderly reformulation. High-NA EUV is assumed to enter production use in logic from around 2027–2028, broadening toward the end of the decade, in line with chipmaker and ASML statements.
Base Year
2025
Historical Period
2022 – 2024
Forecast Period
2026 – 2032
Primary Interviews
150+
Historical data (2022–2025) and forecast period (2025–2032)
Our research process spans primary interviews with industry stakeholders combined with comprehensive secondary data analysis, validated through triangulation across multiple independent sources.
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View Subscription PlansIntroduction
The global EUV photoresists market is highly consolidated. A small group of suppliers, most of them headquartered in Japan, holds the large majority of qualified positions on EUV layers at the world's leading foundries, logic IDMs and DRAM makers. This structure results from the very high barriers to entry described by the market's technical requirements: EUV-specific chemistry, ultra-high-purity manufacturing, access to EUV exposure for development and testing, and long customer qualification cycles that favour suppliers with established track records. The concentration of demand among a few chipmakers reinforces consolidation, since each customer qualifies only a limited number of suppliers per layer and tends to retain them for the life of a node.
Competition in this market is fought primarily on technology, quality and service rather than on price. Suppliers compete to have their resists qualified on new layers at each node transition, each new DRAM generation and each step toward High-NA EUV, because a layer won at the start of a node is usually retained for its production life. The main competitive levers are resist performance on the resolution, roughness, sensitivity and defectivity trade-off; batch-to-batch consistency and contamination control; the ability to supply from multiple sites, including plants near customers; technical support embedded in customers' process teams; and partnerships that extend a supplier's capabilities into new chemistries or into integration with deposition, etch and purification technologies.
The basis of competition is shifting in three ways. First, metal oxide and dry-deposited resists are creating new competitive arenas in which positions are not yet settled, and in which intellectual property and partnerships matter as much as formulation skill. Second, equipment companies, led by Lam Research, have entered the market through dry resist, changing the boundary between materials and equipment. Third, customers' push for second sources and local supply is opening opportunities for challengers and specialists while requiring incumbents to invest heavily in new plants. Ownership is also changing, with Japan Investment Corporation taking JSR private in 2024 and Reuters reporting in November 2026 that JIC plans to sell JSR to Mitsui Chemicals.
Key Player Positioning
The leading companies in the market can be grouped into leaders, challengers and niche players according to their breadth of EUV resist products, the strength of their qualified positions at major customers, their regional manufacturing presence and their role in emerging chemistries. The grouping is qualitative and does not represent numeric market shares.
The leaders are JSR Corporation, Tokyo Ohka Kogyo (TOK) and Shin-Etsu Chemical. JSR combines a long-established chemically amplified resist business with the leading metal oxide resist platform through Inpria, which it acquired in 2021; it operates EUV resist development and production in Japan, Belgium, the United States and South Korea, completed its dedicated MOR plant in Ochang on 30 September 2026, and is establishing production in Taiwan through a joint venture. Its cross-licensing agreements with Lam Research (2025) and Entegris (2026) position it at the centre of the MOR and dry resist ecosystem. TOK is one of the most broadly qualified EUV resist suppliers, with production in Japan, Taiwan and South Korea, a new photoresist manufacturing building at Koriyama due to start operation in the second half of 2026, a new plant under construction in Pyeongtaek, and a strategic investment in Irresistible Materials to extend its chemistry portfolio. Shin-Etsu Chemical brings an integrated lithography materials business, including EUV resists, multilayer materials and photomask blanks, with production in Japan and Taiwan and a major new base under construction in Gunma Prefecture. All three hold long-standing positions on critical layers at the leading chipmakers.
The challengers are Fujifilm, Sumitomo Chemical, Qnity Electronics and Lam Research. Fujifilm, a leader in ArF negative-tone imaging, entered EUV resist sales in October 2024 with negative-tone EUV resists and a dedicated developer and has expanded production and quality evaluation in Japan and South Korea. Sumitomo Chemical, a major ArF resist supplier, sells EUV resists from its Osaka Works, plans EUV production in South Korea and is developing next-generation organic molecular resists. Qnity, independent from DuPont since November 2025, offers a broad electronics materials portfolio including lithography materials, with production in South Korea and elsewhere. Lam Research competes through a different model, with its Aether dry resist platform selected as the production tool of record for advanced DRAM in January 2025 and a five-year High-NA collaboration with IBM. Each challenger has strong technology and customer relationships but a narrower set of qualified EUV positions than the leaders.
The niche players are Merck KGaA, Dongjin Semichem and Irresistible Materials. Merck's electronics business is a major supplier of patterning materials and focuses on EUV ancillaries such as rinse and underlayer products, alongside resist development and PFAS-alternative research. Dongjin Semichem is South Korea's leading domestic photoresist producer and was the first Korean company to supply EUV resist to a production layer at Samsung, with a role tied closely to Korean localisation policy and to Samsung's U.S. expansion. Irresistible Materials is a UK developer of the Multi-Trigger Resist platform for low-NA and High-NA EUV, now backed by TOK. These companies have specialised positions or technologies but limited volume on EUV production layers.
Competitor Dashboard
The ratings reflect the grouping of companies. The leaders score highest on product portfolio and industry experience, reflecting their broad, long-qualified EUV resist ranges, while JSR's alliances with Lam Research, Entegris, imec and Applied Materials give it the highest rating on partnerships. Lam Research's high alliance and regional presence ratings reflect its global equipment service network and its collaborations with JSR, IBM and research institutes, while its product portfolio rating reflects a focus on dry resist alone. Niche players score lower on portfolio and presence but can hold important technology or regional positions.
Porter's Five Forces framework is used here to assess the structural attractiveness of the EUV photoresists market for suppliers. The market's small customer base, demanding technical requirements and long qualification cycles produce a structure that differs markedly from that of commodity chemicals: barriers to entry are very high and substitution risk is limited, but customers hold significant bargaining power and competition among the few qualified suppliers is intense on each new node. The analysis treats the market as a whole, but the balance of forces differs somewhat by segment: chemically amplified resists for mature EUV nodes face stronger buyer pressure and more competition from second sources, while metal oxide and dry-deposited resists for the newest layers are supplied by fewer companies and are protected by patents and by the scarcity of production-ready alternatives.
The threat of new entrants is rated Low. A new supplier must develop resist chemistry that meets EUV requirements for resolution, roughness, sensitivity and stochastic defectivity, which requires sustained research spending, specialised synthetic capability and regular access to EUV exposure tools that cost well over US$150 million each or to shared facilities with limited capacity. It must then build manufacturing capable of producing material with trace metal levels in the parts-per-trillion range and with lot-to-lot consistency that chipmakers can rely on, and it must pass customer qualification on specific layers, a process that can take a year or more and that customers are reluctant to start without evidence of prior success. Patents covering key chemistries, including the metal oxide resist portfolio built by Inpria since 2007, add a further barrier, although recent cross-licensing agreements have reduced litigation risk for some players. The few entrants that have progressed, such as Dongjin Semichem in South Korea and Irresistible Materials in the United Kingdom, have done so with strong support from a domestic customer, government policy or a strategic investor, rather than purely on their own.
Dry resist represents a different form of entry, in which an equipment company enters the market through its tools, but this route is open only to firms with established positions in deposition and etch equipment. Government policy could raise the threat of entry in specific countries. South Korea's support for domestic materials suppliers since 2019, China's push to localise photoresist supply and the incentives available under industrial policies in the United States, Japan and India all lower the cost of entry for locally based firms. However, these measures address capital and market access rather than the core technical barriers, and the evidence to date is that policy-supported entrants gain production positions slowly, starting with less critical layers. Acquisitions provide another route: a company outside the market can enter by buying an established resist maker, as Mitsui Chemicals was reported in November 2026 to be planning with JSR, but such transactions change ownership without adding a new supplier. Overall, the barriers are high enough that the number of suppliers with meaningful production positions is unlikely to increase significantly within the forecast period.
The bargaining power of suppliers is rated Medium. Resist producers depend on a limited number of qualified sources for photoacid generators, specialty monomers, high-purity solvents, tin and other metal-organic precursors, filtration media and high-purity containers. Switching an input supplier requires internal qualification and often notification to, and approval by, customers, which gives incumbent input suppliers a degree of leverage. Some specialty inputs are produced by only one or two companies worldwide, and the move to metal oxide and dry resists is creating new dependencies on metal precursor producers whose capacity is still being built. Against this, the largest resist makers have considerable purchasing power, long-standing relationships with their suppliers and, in many cases, in-house capability to synthesise critical components. The volumes involved are small relative to the input suppliers' total business, which limits the pressure either side can apply, and the shared interest in maintaining qualified positions encourages long-term cooperation rather than confrontation. Supplier power is therefore meaningful for specific critical inputs but does not dominate the economics of the market. Equipment and service suppliers form a second group whose influence is worth noting.
ASML is the sole supplier of EUV scanners, and resist makers depend on access to its tools, either directly or through research institutes, to develop and test their products. Track makers, whose coat-and-develop systems process every EUV wafer, influence how resists are dispensed, baked and developed and must adapt their hardware for new chemistries such as metal oxide resists. Filter and container suppliers determine the final purity of the product. None of these suppliers sells inputs in the conventional sense, but each controls a capability without which a resist cannot be developed or delivered, and resist makers must align their roadmaps with them. This dependence adds to supplier power in a qualitative sense, reinforcing the Medium rating.
The bargaining power of buyers is rated High. The customer base for EUV resists is very concentrated: a small number of foundries, one major logic IDM and three major DRAM producers account for nearly all volume demand, and the largest individual chipmakers account for a substantial share of the market on their own. These customers set the specifications, control qualification and decide which suppliers are used on each layer. They have deep technical knowledge of resist performance and can compare suppliers directly on their own tools. Increasingly, they insist on second sources, multi-site supply and local production, and they use the prospect of qualification on new nodes as leverage in commercial negotiations. Their power is tempered by the high cost of switching once a resist has been qualified on a production layer and by the small share of resist in total wafer cost, which means that chipmakers prioritise performance and reliability over price. Nonetheless, the combination of concentration, technical expertise and control over qualification gives buyers the strongest position in the market's structure. Buyer power is exercised in ways that go beyond price.
Chipmakers require suppliers to disclose detailed information about raw materials and production processes, to maintain quality systems aligned with automotive and data-centre reliability standards, to hold inventory near the fab and to build capacity in the chipmaker's preferred locations, often at the supplier's own expense. They can also shape the direction of resist development by choosing which chemistries to evaluate and by sharing or withholding process data. In some cases, chipmakers co-develop resist formulations with suppliers and retain rights over the resulting process knowledge. The growing concentration of leading-edge production at a few companies, particularly in foundry logic, has strengthened this position over time, and the addition of new fabs in new countries has increased chipmakers' ability to demand local investment from suppliers as a condition of continued business.
The threat of substitutes is rated Low. Within the scope of this market, alternative resist chemistries such as metal oxide and dry-deposited resists are part of the market rather than substitutes for it. Genuine substitutes would be patterning approaches that avoid EUV lithography altogether. DUV immersion lithography with multiple patterning can achieve dimensions similar to single-exposure EUV on some layers, and it remains the only option for chipmakers without EUV access, such as those in China, but at leading-edge production sites it is more expensive, slower and less precise for the most critical layers and is being displaced by EUV rather than the reverse. Nanoimprint lithography, directed self-assembly and electron-beam direct writing are used or studied for specific applications but are not expected to replace EUV for high-volume logic or DRAM patterning within the forecast period. Because every EUV exposure requires a resist, substitution risk for the market depends on substitution of EUV lithography itself, which is low as long as leading-edge scaling continues. Two longer-term developments could change this assessment beyond the forecast period.
Three-dimensional DRAM architectures, now under development at all major memory makers, would shift part of the patterning burden from lithography to deposition and etch, potentially reducing the number of EUV layers per bit compared with continued planar scaling. In logic, increasing use of advanced packaging and chiplets allows some functions to be built on less advanced nodes, which reduces the share of total silicon processed at the leading edge, although the most performance-critical dies continue to require EUV. Neither development is expected to reduce demand for EUV resists within 2026–2032, since they remain at early stages and since the leading-edge dies at the heart of AI systems continue to move to more EUV-intensive nodes. The threat of substitutes therefore remains low for the forecast period.
The intensity of competitive rivalry is rated High. Although the number of qualified suppliers is small, competition among them is intense and centres on winning and defending qualified positions on each new node and layer. Every node transition, every new DRAM generation and every move to High-NA EUV reopens competition for the layers involved, and the supplier that wins a layer typically retains it for the life of the node. Suppliers therefore compete through heavy investment in research, EUV testing capacity, local manufacturing and technical service, and through partnerships that give them advantages in emerging chemistries. The entry of equipment companies through dry resist and the growing role of challengers such as Fujifilm, Sumitomo Chemical, Qnity and Korean domestic suppliers have widened the field. Price competition is moderated by the importance of performance and reliability, but chipmakers' second-sourcing strategies and the threat of losing a layer at requalification keep pressure on suppliers to improve performance and service continuously. Consolidation pressures are also visible, with Reuters reporting in November 2026 that Japan Investment Corporation plans to sell JSR to Mitsui Chemicals in a transaction that could exceed 1.3 trillion yen. Rivalry also has a geographic dimension.
Suppliers compete not only for layers but for positions at new fabs in new countries, where the first qualified local source has a lasting advantage, and this has triggered a wave of plant investments in South Korea, Taiwan and Japan since 2024. Rivalry among the leading Japanese suppliers is long-standing, and each has particular strengths: JSR in metal oxide resists through Inpria, TOK in breadth of customer relationships and local production, and Shin-Etsu in integrated lithography materials including photomask blanks. Because these strengths differ, competition tends to be layer-specific rather than across the board, and it is most intense where several suppliers can meet the same specification. The result is a market in which positions shift gradually with each technology transition rather than suddenly.
Taken together, the five forces describe a market in which established suppliers enjoy strong protection from new entrants and substitutes, but in which value capture is constrained by the power of a small group of sophisticated customers and by continuous competition for qualification at each technology transition. Profitability depends on maintaining technical leadership on the layers that matter most to customers and on matching their geographic expansion. Over the forecast period, the balance of forces is expected to remain broadly stable, with two possible shifts: buyer power may increase further as chipmakers formalise second-sourcing and multi-site requirements, while supplier power may rise for metal precursors and dry resist chemistry if adoption of these materials outpaces the build-out of qualified supply. Consolidation among resist makers, if it proceeds, would reduce the number of independent suppliers but would not by itself lower the barriers facing new entrants. Table 5.1 summarises the rating and the key reason for each force.
Threat of New Entrants: Low; EUV-specific chemistry, ultra-high-purity manufacturing, access to EUV exposure and lengthy customer qualification create very high entry barriers.
Bargaining Power of Suppliers: Medium; Few qualified sources for photoacid generators, monomers and metal precursors, offset by the scale and in-house capability of leading resist makers.
Bargaining Power of Buyers: High; A small number of foundries, logic IDMs and DRAM makers control specifications, qualification and second-sourcing decisions.
Threat of Substitutes: Low; Every EUV exposure requires a resist; DUV multiple patterning and other patterning methods are not viable replacements at the leading edge.
Competitive Rivalry: High; Few suppliers compete intensely for qualified positions at each node, DRAM generation and High-NA transition.
Market estimates by geography (2032)
InsightAsia Pacific leads with $715.20M by 2032, while North America is projected to grow fastest at a 19.6% CAGR.
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View Subscription Plans| REGION | 2022 | 2025 | 2032 | CAGR | SHARE |
|---|---|---|---|---|---|
| North America | $33.10M | $85.50M | $197.60M | 19.6% | 20% |
| Europe | $10.20M | $25.00M | $55.30M | 18.4% | 6% |
| Asia Pacific | $207.30M | $395.80M | $715.20M | 13.2% | 72% |
| Latin America | $1.50M | $3.70M | $7.90M | 18.1% | 1% |
| Middle East & Africa | $2.30M | $5.40M | $11.90M | 17.9% | 1% |
| Total | $254.40M | $515.40M | $987.90M | 14.5% | 100% |
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View Subscription PlansTotal Market Size
$987.90M
| APPLICATION | REVENUE ($B) | GROWTH RATE | MARKET PENETRATION |
|---|---|---|---|
| Chemically Amplified Resists (CAR) | $573.00M | 10.4% | 58% |
| Metal Oxide Resists (MOR) | $296.40M | 27.9% | 30% |
| Dry-Deposited & Hybrid Resists | $118.50M | 22.7% | 12% |
* Revenue projections based on 2025 estimates. Growth rates represent CAGR 2024–2030. Market penetration indicates current adoption rate within addressable market segments.
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Analytical insights on EUV Photoresists Market covering market dynamics, competitive landscape, and strategic outlook.
The EUV Photoresists Market market is projected to reach $987.90M by 2032, growing at 14.5% CAGR. The Chemically Amplified Resists (CAR) segment holds the largest share.
Demand for EUV photoresists is shaped by forces that operate at three levels. At the macro level, the market depends on the investment plans of a handful of chipmakers, which are in turn driven by demand for AI accelerators, data-centre processors, smartphones and memory, and by the industrial policies of the United States, Japan, South Korea, Taiwan, the European Union, China and India. At the technology level, the market depends on how many EUV exposures each wafer receives, which is determined by node roadmaps, DRAM generation transitions and the arrival of High-NA EUV scanners. At the materials level, the market depends on the ability of resist chemistry to overcome stochastic defects, on the speed of customer qualification and on the regulatory acceptability of the chemicals used in each formulation.
These forces do not all point in the same direction. Some, such as rising EUV layer counts and the build-out of leading-edge fabs, add volume. Others, such as stochastic defectivity, PFAS regulation and export controls, slow adoption, add cost or redirect supply. A third group, including the shift toward metal oxide and dry-deposited resists and the integration of resist chemistry with deposition and etch equipment, changes the composition of demand and the basis of competition rather than its overall level. Understanding the market therefore requires both an assessment of the relative weight of the main macro and micro factors over the forecast period and a closer look at the specific drivers, restraints, opportunities and trends that matter most for suppliers and customers.
Market Growth Factor Analysis
Ten factors, five macro and five micro, influence the growth of the EUV photoresists market across three forecast windows: 2026–2027, 2028–2030 and 2031–2032. Each factor is classified by type and by whether it promotes, inhibits or holds steady the growth of the market. The scores are analyst assessments on a scale of 0 to 10, where a higher score indicates a stronger influence on the market in the stated direction; they are based on the secondary and primary research conducted for this study and are intended to show the relative weight and timing of each factor rather than to measure it precisely.
The two highest-scoring promoting factors in the early forecast window are AI-driven demand and the rising number of EUV layers per wafer. Both are already visible in the ramp of 2 nm-class logic and in the move of DRAM makers to 1c-class generations, and both remain strong through 2030 before easing slightly as the base of production becomes larger. Government incentives score highly in 2026–2027 because many of the fabs supported by the U.S. CHIPS and Science Act, Japanese subsidies and Korean tax credits are entering equipment installation and ramp in this window; their influence moderates later as these fabs reach steady-state operation and as new incentive schemes, such as the European Commission's Chips Act 2.0 proposal of June 2026 and India's Semicon 2.0 framework of July 2026, focus more on design, demand and ecosystem measures.
High-NA EUV and the shift toward metal oxide and dry-deposited resists show the opposite pattern. Their scores are moderate in 2026–2027, when High-NA scanners are installed mainly for development and early qualification and when MOR and dry resist are used on a limited set of layers. Their influence increases sharply in 2028–2030 and reaches the highest level in 2031–2032, when High-NA is expected to be in production at several chipmakers and when new resist chemistries are expected to account for a larger share of advanced-node layers.
Among the inhibiting factors, stochastic defectivity and long qualification cycles weigh most heavily at the start of the forecast period, because every new node and every new resist chemistry must pass extensive defect and yield testing before it is used in volume. This factor eases gradually as metal oxide and dry resist platforms mature. PFAS regulation follows the reverse path: its effect is limited while the European Union completes its restriction process and the United States refines its TSCA reporting rule, but grows from 2028 onward as restrictions or reporting obligations take effect and reformulation becomes necessary. Export controls and Japan–China trade frictions are scored as a persistent medium-level inhibitor, given the concentration of resist production in Japan and the possibility of further restrictions on materials trade. The memory market cycle is scored as steady, since it can both accelerate and delay DRAM investment, and supplier concentration is likewise steady, as the build-out of local plants by leading suppliers improves supply security without changing the small number of qualified sources.
Rising EUV Layer Counts in 3 nm and 2 nm-Class Logic
The most direct driver of EUV photoresist demand is the steady increase in the number of wafer layers patterned with EUV light at each successive logic node. When EUV was first introduced into high-volume manufacturing around 2019, it was used on only a handful of layers at the 7 nm class, mainly to replace the most complex multiple-patterning steps in the metal and via stack. At the 5 nm class, chipmakers moved many more critical layers to EUV, and the 3 nm class extended EUV further into the middle-of-line contacts and tight-pitch interconnects. Each EUV layer requires its own coat of resist, its own exposure and its own development, so every layer that moves from DUV multiple patterning to EUV, and every new EUV layer added by design scaling, creates a new and recurring requirement for EUV resist on every wafer processed. Because resist is consumed wafer by wafer and layer by layer, the effect compounds: a fab that doubles the number of EUV layers per wafer at constant wafer starts roughly doubles its EUV resist consumption, before any change in wafer volume is considered. The economic logic behind this shift is well established.
Before EUV, the tightest layers were printed with 193 nm immersion lithography using self-aligned double or quadruple patterning, or with repeated litho-etch sequences, each of which added deposition, etch and cleaning steps, extra masks and additional opportunities for overlay error. A single EUV exposure can replace three or four immersion exposures together with their associated process steps, shortening cycle time and improving pattern fidelity. Once a chipmaker has EUV capacity installed, design teams take advantage of it by moving more layers onto EUV and by tightening design rules on layers that were already EUV, so the resist content of each wafer rises with every node even when the total number of mask layers changes little. This cumulative effect explains why EUV resist demand has grown faster than leading-edge wafer output since EUV entered production.
This trend is now being reinforced by the transition from FinFET to gate-all-around nanosheet transistors at the 2 nm class. TSMC began volume production of its N2 process, its first nanosheet node, in the fourth quarter of 2025, ramping it across Fab 22 in Kaohsiung and Fab 20 in Hsinchu, and it plans the N2P variant and the A16 node with backside power delivery to follow. Samsung confirmed mass production of its first-generation SF2 process in its fourth-quarter 2025 results, and Intel's 18A process, which combines RibbonFET gate-all-around transistors with PowerVia backside power delivery, entered production at Fab 52 in Arizona in 2025. These architectures increase patterning complexity in several ways. Nanosheet devices require tighter gate and contact pitches and more precise alignment between the front-end and middle-of-line layers. Backside power delivery moves the power network to the reverse side of the wafer, which frees front-side routing tracks but allows designers to tighten the signal interconnect pitch further. Metal pitches in the low-20 nm range approach the single-exposure resolution limit of 0.33 NA scanners, so some critical layers require EUV double patterning, in which two separate EUV exposures and two separate resist coats are used to form a single layer.
Further architectural changes are already on chipmakers' roadmaps. Forksheet and complementary FET structures, in which n-type and p-type transistors are placed side by side with a dielectric wall or stacked vertically, are being developed by imec and leading chipmakers for nodes later in the decade, and each requires additional fine patterning of gates, contacts and local interconnect. The continued scaling of SRAM cells, which occupy a large proportion of the area of processors and AI accelerators, also depends on tighter contact and metal pitches. In practice, every step along this roadmap adds either new EUV layers, more EUV exposures per layer or tighter specifications on existing EUV layers, and in most cases all three at once.
The effect on demand goes beyond the simple count of layers. As pitches shrink, the resist film must become thinner to avoid pattern collapse, which reduces the volume of material per coat but sharply raises the performance specification and therefore the price per litre. Process windows are narrower, so fabs consume additional resist in test wafers, focus-exposure matrices and rework during the early months of a node ramp. Chipmakers also tend to qualify different resists for different layer types: positive-tone chemically amplified resists used with dark-field masks remain the leading option for contacts and vias, while line-space metal layers are increasingly evaluated with metal oxide resists that offer better etch resistance at thin film thickness. A single 2 nm-class process flow therefore draws on several resist products, often from more than one supplier, each of which must be supported by its own technical service and quality control. For suppliers, the value captured per wafer at the 2 nm class is materially higher than at the 7 nm class, even when the physical volume of resist per layer is lower. The supporting requirements also scale with the node.
Resist for 2 nm-class layers must be filtered to remove particles and gels at the few-nanometre scale, held to trace metal levels measured in parts per trillion, and released only after lot acceptance tests that may include exposure on an EUV scanner and inspection of the printed patterns. Suppliers must keep larger numbers of product variants in production, since a single customer may use different formulations for different layers and different versions of the same formulation across fabs. These costs are reflected in pricing and reinforce the tendency for value per wafer to rise faster than the number of layers. They also explain why chipmakers value suppliers able to provide consistent material from more than one production site, since a quality excursion on a single critical layer can halt output across an entire fab.
The segments most affected by this driver are the 3 nm and 2 nm & Below technology nodes and the Foundries and Logic IDMs end users. Foundries carry the largest share of leading-edge logic wafer starts and are the first to ramp each new node for smartphone, PC and AI accelerator customers. Logic IDMs, led by Intel, add a second source of 2 nm-class demand through their own product roadmaps and, increasingly, through foundry services for external customers. The 7 nm / 6 nm and 5 nm / 4 nm nodes remain large consumers because of their installed capacity, but their layer counts are fixed and their wafer volumes are mature, so incremental demand from layer growth is concentrated at the newer nodes. Within resist types, the driver supports CAR on contact and via layers, where it remains the qualified incumbent, while creating the first high-volume openings for metal oxide and dry-deposited resists on the tightest metal layers where CAR approaches its roughness and collapse limits. The timing of node introductions shapes how this demand builds through the forecast period.
TSMC's N2 family is ramping through 2026, A16 with backside power is scheduled to follow, and A14 is planned for high-volume production later in the decade; Intel's 18A is being followed by 14A, and Samsung is moving from SF2 to SF2P and further variants. Each step either adds EUV layers or tightens existing ones, so layer-count growth is not a one-off event but a recurring source of demand. Geographically, the driver is strongest in Taiwan, where TSMC concentrates its newest nodes, followed by the United States, where Intel and TSMC are building leading-edge capacity, and South Korea, where Samsung Foundry operates its 2 nm-class lines.
EUV Adoption Across DRAM Generations and High-Bandwidth Memory
A second and faster-moving driver is the adoption of EUV lithography by DRAM manufacturers. DRAM makers were slower than logic producers to use EUV, because DRAM cell arrays can be patterned with self-aligned multiple patterning using DUV immersion lithography, and because the cost of EUV exposure had to be justified against the low price per bit of commodity memory. That calculation has changed. Samsung was the first to use EUV in DRAM production, starting with its 1z-class generation in 2020. SK hynix first applied EUV to its 14 nm-class 1a generation in 2021 and has since expanded its use through the 1b generation. Micron, which had produced five DRAM generations without EUV up to 1β, adopted EUV for its 1γ (1-gamma) generation from 2025, initially in Taiwan and then at its Hiroshima site in Japan. As a result, all three major DRAM producers now consume EUV resists in volume, and each new DRAM generation adds EUV layers. The reasons for this shift are rooted in the physics and economics of DRAM scaling.
As cell half-pitches have moved into the low-teens of nanometres, self-aligned quadruple patterning with immersion lithography requires a growing number of deposition, etch and spacer steps, each of which adds variability and cost. The storage-node contacts and landing pads that connect each cell capacitor to its access transistor must be placed with very tight overlay, and errors accumulate across multiple patterning passes. EUV allows several of these steps to be replaced by a single exposure, improving placement accuracy and shortening the process flow. With DRAM makers moving to a new generation roughly every one to two years, and with each generation shrinking the cell further, the number of layers for which EUV is the better economic choice keeps increasing. DRAM periphery circuits, which handle sensing and input-output functions, are also being redesigned with logic-like transistors that benefit from EUV patterning.
The number of EUV layers per DRAM wafer is rising quickly. SK hynix was reported in August 2025 to be planning at least five EUV layers in its 1c (sixth-generation 10 nm-class) DRAM, two more than the previous generation, and similar increases are expected at Samsung and Micron for 1c and 1d generations. DRAM patterning places particular demands on resist. The storage-node contact and landing-pad layers consist of dense hexagonal or honeycomb arrays of small holes and islands, where missing or merged features translate directly into failed bits. The bit-line and periphery layers require tight pitches with very low defect density across a large die area. These requirements favour resist chemistries with high EUV absorption and good etch transfer, which is why DRAM has become the first high-volume application for both metal oxide and dry-deposited resists. In January 2025, Lam Research announced that its Aether dry resist technology had been selected by a leading memory manufacturer as the production tool of record for its most advanced DRAM processes, and JSR's metal oxide resist plant in Ochang, South Korea, completed on 30 September 2026, was built to supply tin-based MOR to Samsung Electronics and SK hynix.
The fit between these chemistries and DRAM is specific. Metal oxide resists are typically negative-tone, so they are well suited to printing pillars and islands, and their strong EUV absorption allows thin films that resist pattern collapse in dense arrays. Their inorganic content provides etch resistance that simplifies transfer of the pattern into the hard mask, an advantage when the underlying film stack is thick. Dry-deposited resists add the ability to form films without spin-coating and to develop them without liquid, which avoids the capillary forces that can collapse tall, closely spaced features during drying. Because DRAM makers produce very large volumes of a small number of designs, they can afford to qualify a new chemistry on a few critical layers and then use it across many wafers, which makes memory a more natural first adopter than foundries that must support thousands of customer designs on each node.
High-bandwidth memory adds a further layer of demand. Each HBM stack used in an AI accelerator combines multiple DRAM dies, typically eight to sixteen in current HBM3E and HBM4 products, on top of a base die. Because each stack requires many DRAM dies and because HBM dies are larger than standard DRAM dies for the same capacity, HBM consumes significantly more DRAM wafer capacity per bit than conventional memory. The rapid growth of AI data-centre investment since 2023 has therefore pulled DRAM wafer starts toward the most advanced generations, which are also the most EUV-intensive. In addition, the base dies for HBM4 are being manufactured on foundry logic processes rather than on DRAM processes, which adds a link between HBM growth and EUV resist demand at foundries. Memory makers are also preparing for High-NA EUV: SK hynix installed a production-grade TWINSCAN EXE:5200B at its M16 fab in Icheon in September 2025, and Samsung was reported in September 2026 to be planning High-NA deployment in DRAM manufacturing in 2028. The shift toward HBM has also changed how memory makers allocate capacity.
Throughout 2024, 2025 and 2026, HBM supply was tight, and producers prioritised the most advanced DRAM generations for HBM and high-capacity server modules, converting older lines and accelerating new fab construction. This reallocation increases the share of DRAM wafers processed on EUV-intensive generations even when total DRAM wafer starts grow only moderately. Longer-term, the industry's direction remains open to change: in October 2026 Micron indicated that it would continue planar scaling and pursue a transition to three-dimensional DRAM rather than adopt a 4F² cell layout, and future 3D DRAM architectures may alter the balance between lithography and deposition-etch steps. Within the forecast period, however, continued planar scaling with more EUV layers per generation remains the expected path.
High-NA EUV Resist Platforms for Sub-2 nm Logic and Advanced DRAM
High-NA EUV lithography represents the largest single product opportunity for EUV resist suppliers over the forecast period. ASML's 0.55 numerical aperture scanners, the TWINSCAN EXE:5000 for development and the EXE:5200 series for production, can resolve features of about 8 nm in a single exposure, compared with about 13 nm for the 0.33 NA systems used in current production. This allows chipmakers to print critical layers in one exposure that would otherwise require EUV double patterning. The optical design comes with constraints that directly affect resist requirements. The depth of focus is smaller, so the resist film must be thinner, and a thinner film absorbs fewer photons unless its chemistry absorbs more strongly. The anamorphic optics halve the exposure field in one direction, so large dies must be stitched from two exposures, placing new demands on edge acuity and overlay. Because no existing resist was designed around these conditions, every High-NA layer is effectively a new qualification, giving suppliers a fresh opportunity to win positions rather than defend existing ones. High-NA also changes the interaction between the mask and the resist.
At the steeper angles of incidence used in high numerical aperture optics, the thickness of the mask absorber casts shadows and introduces three-dimensional effects that degrade image contrast, which is why mask makers are developing thinner, low-refractive-index absorbers. Lower image contrast places a heavier burden on the resist to produce sharp, low-roughness features. The scanners themselves represent a very large investment, with reports in 2025 and 2026 placing the cost of an EXE:5200B at roughly US$350 million or more per system, so chipmakers will seek to maximise their throughput by using the lowest workable exposure dose. A resist that achieves the required patterning quality at a lower dose directly increases the number of wafers a High-NA scanner can process, which gives suppliers a clear and measurable way to demonstrate value to customers.
The timing of this opportunity has become clearer during 2025 and 2026. Intel announced in December 2025 that it had completed acceptance testing of a TWINSCAN EXE:5200B to support development of its 14A process, for which it targets risk production in 2027. Samsung received its first EXE:5200B in late 2025, with a second unit expected in the first half of 2026, and SK hynix installed a production-grade EXE:5200B at its M16 DRAM fab in September 2025. TSMC, which had stated that it would not use High-NA for its A14 node, was reported in September 2026 to be targeting High-NA introduction into high-volume manufacturing in 2030, and Samsung was reported to plan High-NA use in DRAM from 2028. Ecosystem work has advanced in parallel: imec, working with ASML in the joint High-NA EUV lab in Veldhoven, reported single-exposure High-NA patterning of 20 nm pitch lines with 13 nm tip-to-tip spacing using a metal oxide resist in September 2025, and in September 2026 it reported that chemically amplified resists can also be extended to 22 nm pitch with High-NA. Newer entrants are also planning around High-NA.
Rapidus, having begun 2 nm pilot production in Hokkaido, plans to start development of a 1.4 nm process in 2026 and to begin construction of a fab for that node in 2027, and imec's position is that single-patterned layers at the 1.4 nm generation require High-NA EUV. These schedules suggest that High-NA demand for resists will develop in waves: an initial phase from 2026 to 2028 dominated by development and early production at Intel and the memory makers, a broader phase from around 2028 to 2030 as Samsung and others bring High-NA into DRAM and logic production, and a further phase from 2030 as TSMC and Rapidus adopt it. Each wave involves new customers, new process flows and new resist qualifications.
These results show that the High-NA opportunity is contested between chemistries, which raises its value for suppliers that can offer more than one solution. Metal oxide resists are widely seen as the leading candidates for line-space metal layers because their higher absorption suits thin films, while positive-tone chemically amplified resists with dark-field masks remain leading candidates for contacts and vias. Dry-deposited resists offer the ability to tune film composition through the thickness and to remove the wet development step, which may reduce pattern collapse at the smallest pitches. The first resist qualified on a High-NA layer at a given chipmaker is likely to remain in place for the life of that node, which typically spans several years of production and successive node variants. Because High-NA resists must deliver more performance per unit volume, they are also expected to command higher prices than current-generation materials. Suppliers that engage early in customer and consortium development programmes, and that can provide matched underlayers and process know-how, stand to secure long-lived positions. Suppliers have already adjusted their research footprints to address this opportunity.
JSR decided in August 2024 to establish a new research and development centre for metal oxide resists in the Kanto area of Japan, chosen for its proximity to global customers and partner companies, in addition to its existing development centre at the Yokkaichi plant. Irresistible Materials has positioned its Multi-Trigger Resist chemistry specifically for both low-NA and High-NA EUV, and dry resist developers are working with research institutes to demonstrate their films on High-NA scanners. The intensity of this activity reflects the scale of what is at stake: a supplier that is absent from the first High-NA qualifications at a major customer may find itself excluded from that customer's most advanced layers for a full node cycle or longer, while a supplier that wins early positions can build on them as High-NA spreads to more layers and more customers.
The opportunity is concentrated in the 2 nm & Below (incl. High-NA) technology node category, which captures High-NA consumption in both logic and DRAM. Among end users, Logic IDMs gain the earliest exposure through Intel's 14A programme, followed by memory manufacturers as SK hynix and Samsung move High-NA into DRAM, and by foundries as TSMC and Samsung Foundry bring High-NA into production toward the end of the decade. In resist types, Metal Oxide Resists and Dry-Deposited & Hybrid Resists stand to gain most, but chemically amplified resist suppliers that extend their platforms to High-NA can retain a meaningful share of contact and via layers. Geographically, early High-NA demand is centred in the United States, South Korea and the research clusters of Belgium and the Netherlands, before spreading to Taiwan. The size and timing of the opportunity remain sensitive to chipmakers' economic decisions. If the cost per wafer of High-NA exposure does not fall sufficiently compared with low-NA EUV double patterning, adoption could be confined to a smaller number of layers, and some chipmakers could continue to extend 0.33 NA EUV with multiple exposures.
Even in that case, however, resist demand would not disappear: double patterning with low-NA EUV also consumes additional resist, as each exposure requires its own coat. For suppliers, the more important variable is which chemistry wins each layer, since the transition to High-NA is the point at which customers are most willing to change resist type and supplier. This makes High-NA a structural opportunity for metal oxide and dry resist suppliers in particular, regardless of the exact pace of scanner adoption. It also creates a role for research consortia as gatekeepers of early data, since chipmakers draw heavily on results from shared High-NA programmes when choosing which resists to evaluate in their own fabs, giving suppliers active in those programmes an early advantage.
Localised Production and Qualification Capacity near New Fab Clusters
A second opportunity lies in placing resist production, final processing and quality control close to the fabs that use it. Historically, most EUV resists were formulated, filtered and released in Japan and shipped to customers abroad. That model is changing as customers and governments seek shorter and more secure supply lines, and as new fabs open in places without an established materials base. Suppliers that build local capacity earliest are positioned to become the default source for new sites. Recent investments show how quickly this is happening. JSR completed construction of its metal oxide resist plant at JSR Micro Korea in the Ochang foreign investment zone of Cheongju on 30 September 2026, describing it as its first production base dedicated to MOR, and in April 2026 it established a joint venture, JSR Micro Advanced Manufacturing Taiwan, with LCY Chemical and Wah Lee Industrial, with a plant in Yunlin County targeted for operation as early as 2028. Tokyo Ohka Kogyo held a groundbreaking ceremony in August 2025 for a photoresist and high-purity chemical plant in Pyeongtaek, South Korea, and Fujifilm expanded EUV resist production and quality evaluation at its Pyeongtaek and Shizuoka sites, with operations scheduled from October 2025.
Other suppliers are following similar paths. Sumitomo Chemical was reported in February 2025 to be planning production of EUV and ArF resists in South Korea, which it had previously made only at its Osaka Works, and in April 2026 it decided to build an integrated facility in Osaka combining photoresist process technology management, quality evaluation and advanced analysis. Shin-Etsu Chemical, which already operates a lithography materials plant in Douliu, Yunlin County, Taiwan, announced in April 2024 a new production base in Isesaki, Gunma Prefecture, with an investment of about 83 billion yen and the first phase due for completion in 2026. TOK, present in Taiwan for more than a decade, is adding a new photoresist manufacturing building at its Koriyama plant in Fukushima Prefecture scheduled to begin operation in the second half of 2026. The pattern is consistent: each major supplier is building capacity both at home and next to its largest customers abroad.
Several forces are behind this shift. EUV resist development is iterative: a supplier prepares a formulation, the chipmaker exposes and inspects wafers, and the supplier adjusts the chemistry. When each iteration requires international shipping, customs clearance and controlled-temperature logistics, development cycles stretch by weeks. JSR's chief executive explained in 2026 that local production in Taiwan would remove the need to ship wafers out of the country during co-development, a constraint that applies equally to other suppliers and customers. Governments reinforce the shift: South Korea's Ministry of Trade, Industry and Energy publicly supported the JSR Ochang project as a contribution to supply-chain stability, and Japanese suppliers have received local support in several host countries. Customers also value local quality control, since a supplier that can test resist batches on equipment matched to the customer's own tools can resolve quality issues faster. The physical characteristics of EUV resists make proximity more valuable than for many other chemicals. Resists are formulated in flammable organic solvents, so they are shipped as hazardous goods with restrictions on packaging, transport mode and storage.
Many formulations must be kept within controlled temperature ranges and have limited shelf lives, so long transit times reduce the usable life of each batch at the fab. Final filtration and bottling are among the most sensitive steps, since contamination introduced during packaging can cause defects on the wafer, and performing these steps close to the customer reduces the risk of damage or contamination in transit. Local production also simplifies compliance with chemical registration rules in each country, since imported substances above certain volumes must be registered with national authorities, whereas local finishing can be organised around registered intermediates. Local technical staff add further value, because many problems that appear as resist defects on the wafer turn out to originate in dispense equipment, filters, bake conditions or interactions with other materials, and resolving them quickly requires engineers who can work alongside the customer's process teams.
The opportunity extends beyond the established Asian clusters. In the United States, new leading-edge fabs operated by TSMC, Intel and Samsung in Arizona, Oregon and Texas are ramping, while local finishing and quality-control capacity for EUV resists remains limited compared with Taiwan and South Korea. Suppliers that establish final filtration, packaging and testing near these fabs can shorten lead times and reduce the inventory that customers must hold. Dongjin Semichem has established a subsidiary in Texas to serve Samsung's U.S. operations, illustrating the approach. In Japan, the new Rapidus fab in Hokkaido and Micron's EUV-based DRAM expansion in Hiroshima create demand at sites distant from the traditional resist production centres in Kanagawa, Mie and Niigata. In India, the Tata Electronics fab in Dholera, Gujarat, for which ASML agreed in May 2026 to provide lithography technology and which is targeted for completion around 2028, will require a supply base for lithography materials, although its initial process nodes have not been disclosed. Public policy increasingly rewards this kind of localisation. The U.S.
CHIPS and Science Act of 2022 made materials suppliers eligible for manufacturing incentives, and the Section 232 proclamation of January 2026 indicated that any broader future tariffs on semiconductors and related products would be accompanied by a tariff offset programme for companies investing in U.S. manufacturing capacity. The European Commission's Chips Act 2.0 proposal of June 2026 includes measures on supply-chain resilience and monitoring, and Japan and South Korea both provide investment support for materials plants. For suppliers, these incentives reduce the cost of building local capacity and, in some cases, improve the competitive position of locally produced material against imports. In Europe, where Intel operates EUV-based production in Ireland and imec runs EUV and High-NA development lines in Belgium, the opportunity is smaller in volume but significant for technical support and early qualification.
Stochastic Defectivity and the Resolution–Roughness–Sensitivity Trade-off
The main technical restraint on the EUV photoresists market is the difficulty of printing ever smaller features without random defects. In EUV lithography, the energy delivered to each feature arrives as a relatively small number of high-energy photons. Each absorbed photon releases photoelectrons and a cascade of secondary electrons, and it is these electrons that trigger the chemical reactions in the resist. Because both the arrival of photons and the movement of electrons are random, two neighbouring features exposed under identical conditions can receive noticeably different amounts of energy. In a chemically amplified resist, the random distribution of photoacid generator and quencher molecules adds further variation, and acid diffusion during the post-exposure bake blurs the image. The result is stochastic behaviour: rough line edges, local variation in critical dimension, and rare but serious failures such as microbridges between lines, broken lines and missing or merged contact holes. On a chip with billions of contacts and vias, even a failure probability of one in many millions can affect yield. What makes stochastic defects especially difficult is that they do not scale smoothly.
As the target dimension of a contact or line is reduced, the rate of failures often stays low and then rises very steeply over a narrow range, a behaviour engineers describe as a stochastic cliff. A process that looks acceptable on average critical dimension and roughness may still be unusable because its random failure rate is too high. Measuring these failures is itself demanding, because they are rare and randomly located: finding them requires inspection of very large areas with high-resolution e-beam or advanced optical systems, followed by electrical testing to confirm which defects matter. The process window for an EUV layer is therefore defined by two boundaries at once, the conventional limits on dimension and focus, and a separate limit set by the acceptable rate of stochastic failure.
The problem becomes more severe as features shrink. A smaller contact hole collects fewer photons at a given dose, so the relative variation in absorbed energy rises. The usual response is to increase the exposure dose, but higher doses lower scanner throughput, and EUV exposure is already the most expensive step in a leading-edge process. Thinner resist films, which are needed to prevent tall, narrow lines from collapsing and to fit the reduced depth of focus of High-NA optics, absorb fewer photons still. Resist chemists describe the resulting constraint as the resolution, line-width roughness and sensitivity trade-off: a formulation that resolves finer features with lower roughness typically requires a higher dose, and a faster formulation typically sacrifices roughness or resolution. Metal oxide resists ease the trade-off by absorbing more EUV light per unit thickness, but they introduce their own sensitivities. Research presented by imec in February 2026, using a dedicated tool to study how the ambient environment during wafer transfer and post-exposure bake affects metal oxide resists, illustrated how humidity and atmosphere can shift critical dimensions in these materials, adding process-control requirements that fabs must manage. The industry is attacking the trade-off from several directions, but each approach has costs.
ASML continues to raise EUV source power, which allows higher doses without the same throughput penalty, but more powerful sources add energy consumption and maintenance demands. Underlayers designed to generate additional secondary electrons can improve the efficiency of the resist, but they add another material that must be qualified. Within chemically amplified resists, suppliers are redesigning photoacid generators and quenchers to control acid diffusion more tightly; Fujifilm, for example, reported in October 2024 that a photo-decomposable quencher bonded to the photoacid generator reduced line-width roughness by about 17% in its EUV resist. Post-development smoothing and etch trimming can also reduce roughness, but they add process steps and can shift dimensions. None of these measures removes the underlying randomness of EUV exposure, so stochastic control remains a moving target at each new node.
These technical limits translate into long and expensive qualification cycles that restrain market growth. Before a new resist can be used on a production layer, a chipmaker must characterise its lithographic window, inspect large numbers of wafers with high-resolution e-beam and optical inspection tools to measure stochastic defect rates, run electrical test structures through the full process flow and confirm batch-to-batch consistency over many production lots. For a new chemistry such as metal oxide resist, the chipmaker must also verify that the metal content does not contaminate coat-and-develop tracks, bake plates, wafer bevels or downstream tools, which may require dedicated equipment or new cleaning steps. Suppliers, for their part, must hold trace metal and particle contamination at extremely low levels, operate their own EUV exposure and inspection capacity and support each customer with on-site engineers. Qualification for a single layer can take many months, and a customer that has qualified a resist on a node rarely changes supplier during that node's production life because of the cost and risk of requalification. The economics of qualification weigh on suppliers as well as customers.
Developing an EUV resist requires regular access to EUV exposure, either on scanners owned by the supplier, which few can afford, or through shared facilities such as the imec-ASML programmes in Belgium and the Netherlands and the Albany NanoTech Complex in New York. Each development cycle consumes scanner time, wafers, masks and inspection capacity, and the results must then be reproduced on the customer's own tools. Small suppliers and start-ups often lack this access, which slows their progress even when their chemistry is promising. For the market as a whole, the effect is that improvements in resist performance arrive in discrete steps tied to node introductions rather than continuously, and that new chemistries take several years to move from first promising results to broad production use.
The restraint affects the newer segments of the market most. Metal Oxide Resists and Dry-Deposited & Hybrid Resists offer the clearest path past the trade-off, but their adoption is paced by the time chipmakers need to establish defect performance and contamination control, which slows the shift of layers away from chemically amplified resist. The 2 nm & Below (incl. High-NA) node category is the most exposed, since it combines the smallest features with the thinnest films. Among end users, memory manufacturers face the challenge in dense contact and landing-pad arrays, while foundries face it in the contact and via layers of logic devices. The restraint also limits new entrants, because a supplier without an established record of low-defect, consistent supply finds it difficult to secure the evaluation time needed to qualify. The restraint does not reduce the total number of EUV layers that must be printed, since chipmakers will pattern them with whatever resist meets their requirements, but it shapes which resist types capture that demand and how quickly.
In logic, where each node must support a very wide variety of customer designs, foundries are cautious about introducing a new chemistry on a critical layer until its defect performance is well documented across many patterns, which tends to keep chemically amplified resist in place longer. In DRAM, where a small number of highly repetitive designs dominate, memory makers can characterise stochastic behaviour more quickly and are more willing to adopt metal oxide and dry resists early. The restraint therefore contributes to the different adoption speeds of the new chemistries across end users, and it adds cost that suppliers must recover through pricing, which is one reason EUV resists command a substantial premium over DUV resists.
Export Controls, Trade Frictions and Concentrated Supply
The second restraint arises from the geography of supply and the political sensitivity of lithography materials. Most qualified EUV resist volume is produced by a small number of Japanese companies, and even plants located in South Korea, Taiwan, Belgium or the United States often depend on polymers, photoacid generators or metal-organic intermediates made in Japan. Governments have recognised this concentration. In July 2019, Japan tightened export procedures for three materials destined for South Korea, including resists for EUV lithography, alongside fluorinated polyimide and high-purity hydrogen fluoride. The measures did not halt supply, but they forced South Korean chipmakers to reassess their dependence on single sources and to stockpile material. Japan lifted the three-item restrictions in March 2023 and returned South Korea to its preferential trading list in July 2023, yet the episode established photoresist as an instrument of economic policy and continues to influence procurement decisions. The South Korean response showed how such measures can reshape supply chains. The government launched a programme to localise materials, parts and equipment, offering funding and fast-track support to domestic suppliers.
Chipmakers diversified their sources, including by drawing EUV resist from production sites outside Japan; Samsung was reported at the time to have sourced material from JSR's subsidiary in Belgium. Japanese suppliers expanded production in South Korea to reduce exposure to export procedures, and domestic producers such as Dongjin Semichem accelerated their EUV resist programmes. These changes improved resilience but also raised costs, because supply was spread across more sites and more suppliers had to be qualified. The experience taught chipmakers in every region that a material supplied by a small number of producers in one country can be affected by political decisions far removed from the commercial relationship.
Tension has since shifted toward relations between Japan and China. Japan announced additional export controls on more than ten semiconductor-related items in April 2025, which China's Ministry of Commerce publicly opposed. After diplomatic relations deteriorated in November 2025, reports circulated in Chinese and Korean media that Japanese shipments of photoresist to China had been suspended; these reports were not confirmed by the Japanese government, but they unsettled chipmakers. In January 2026, China announced stricter controls on exports of dual-use items to Japan and opened an anti-dumping investigation into Japanese dichlorosilane, a precursor used in semiconductor deposition. In the United States, a Section 232 proclamation signed on 14 January 2026 imposed tariffs on a narrow set of advanced chips and reserved the possibility of broader tariffs on semiconductors, semiconductor manufacturing equipment and derivative products, which has created uncertainty about future treatment of materials imports. Although EUV resists are not currently named in these measures, the pattern of escalating, reciprocal trade actions involving semiconductor materials makes supply disruption a credible risk. These developments sit on top of a broader framework of technology controls built since 2022. The U.S.
Bureau of Industry and Security issued successive rules in October 2022, October 2023 and December 2024 restricting exports of advanced semiconductor manufacturing items and technology to China. The Netherlands introduced its own licensing requirements for advanced lithography systems, and Japan began controlling exports of 23 categories of semiconductor manufacturing equipment in July 2023. ASML has stated that it has never sold an EUV system to China. Although these controls focus on equipment rather than materials, they define the geography of EUV use, and they create a policy environment in which materials could be added to control lists if governments judged it necessary. For a market whose customers plan capacity years ahead, this possibility is itself a source of cost and caution.
These conditions restrain the market in several ways. Chipmakers respond by holding larger safety stocks, qualifying resist from more than one production site and, in some cases, from more than one supplier for the same layer. Each of these steps raises costs without raising wafer output. Suppliers respond by duplicating production, quality control and technical support in several countries, which spreads fixed costs across smaller volumes at each site and delays returns on investment. Trade actions can also raise landed costs or introduce customs delays, a significant concern for materials with limited shelf life that must be shipped and stored under controlled temperatures. Upstream, metal oxide resists add a new dependency on tin and other metal precursors, and the concentration of refined tin and specialty organometallic production in a limited number of countries adds another point of exposure that did not exist for purely organic resists. Currency movements compound these effects.
Because a large share of EUV resist is produced in Japan and priced for export, changes in the value of the yen against the U.S. dollar, the won and the New Taiwan dollar affect both supplier margins and customer costs, and the weak yen of 2024–2026 improved the competitiveness of Japanese exports while raising the relative cost of building capacity abroad. Suppliers that duplicate production in customer countries reduce their exposure to trade measures but take on local cost structures, regulatory registration requirements for chemical substances and the need to recruit specialised staff. Taken together, these factors mean that part of the value customers pay for EUV resist now reflects the cost of resilience, including redundant capacity, inventory and qualification, rather than the cost of the material itself. Some chipmakers have formalised this through long-term supply agreements that commit suppliers to maintain production at more than one site and to hold minimum inventory levels, in return for volume commitments or pricing that covers the additional cost. Such agreements improve continuity of supply but reduce flexibility for both parties, and they tend to favour the largest suppliers, which can spread the fixed cost of redundant capacity across more customers.
Smaller suppliers may find it harder to meet these requirements, which reinforces the concentration that created the concern in the first place.
Convergence of Resist Chemistry with Deposition, Etch and Purification Technology
A defining trend in the EUV photoresists market is the erosion of the traditional boundary between materials suppliers and equipment makers. For most of the history of lithography, the photoresist was a liquid bought from a chemical company, spin-coated on a track tool, exposed in a scanner from a separate equipment maker and developed in a standard aqueous or solvent developer. Each element was optimised largely on its own. At the 2 nm class and below, that separation no longer works well. The most serious failure modes now arise at the interfaces between process steps: adhesion between the resist and its underlayer, pattern collapse during wet development and drying, loss of fidelity when the resist pattern is transferred into the hard mask by etching, and contamination introduced by the delivery and filtration of the material. As a result, the resist is increasingly designed together with the deposition, development, etch and purification processes that surround it, and the companies responsible for those processes are forming closer technical and commercial links. A modern EUV patterning stack illustrates the point.
Beneath the resist sits an underlayer, often a thin spin-on or deposited film designed to promote adhesion, control reflectivity and, in some cases, contribute secondary electrons that improve resist sensitivity. Beneath that sits a hard mask, chosen for its etch selectivity to the layer being patterned. After exposure, the resist may be developed in an aqueous base, an organic solvent or a dry process, then rinsed with a solution designed to prevent collapse, and finally used as a mask in a plasma etch tuned to the resist's composition. Changing any one element alters the behaviour of the others, so the most effective improvements now come from optimising the stack as a whole, which requires resist suppliers, materials companies, track makers, deposition and etch equipment suppliers and chipmakers to share data and coordinate development schedules.
Dry resist technology is the clearest expression of this trend. In Lam Research's Aether process, the resist is not a liquid formulation but a thin film formed in a deposition chamber from vapour-phase metal-organic precursors, and it can be developed in a dry, plasma-based step instead of a liquid developer. Lam has described these metal-organic films as absorbing several times more EUV light than conventional carbon-based resists, and the process allows the composition of the film to be varied through its thickness. Because the resist is created by the tool, the equipment maker controls much of the material performance, and the consumable precursor chemistry becomes part of the equipment supplier's offer. Chemical suppliers have responded by partnering rather than competing head on. In September 2025, JSR, its subsidiary Inpria and Lam Research announced a non-exclusive cross-licensing and collaboration agreement under which JSR/Inpria's patterning resists and films would be integrated with Lam's etch and dry resist deposition technologies, with joint work on metal oxide resists and High-NA patterning; the agreement also brought an end to patent litigation between the companies.
In March 2026, IBM and Lam Research announced a five-year collaboration at the NY Creates Albany NanoTech Complex to develop materials, processes and High-NA EUV lithography for logic scaling below the 1 nm node, explicitly including Aether dry resist alongside Lam's Kiyo and Akara etch and Striker and ALTUS Halo deposition platforms. Lam has also positioned the dry approach on efficiency grounds: when it announced the selection of Aether for advanced DRAM production in January 2025, it stated that the process consumes less energy and five to ten times less chemicals than traditional wet resist processes. Removing the liquid development step eliminates the capillary forces that pull narrow features together as liquid evaporates, which is one of the main causes of pattern collapse at tight pitches. Because the film is built up by deposition, its thickness and composition can be controlled precisely and uniformly across the wafer, including near the edge where spin-coated films can vary. These features illustrate why tool-based resist formation is attractive at the most advanced nodes, and why materials suppliers see partnership with equipment makers as necessary to remain part of future patterning flows rather than an optional extension of their business.
The same logic is visible upstream, in the supply of precursors and in purification. Metal oxide resists depend on tin and other metal-organic compounds that must be synthesised with very low levels of unwanted metals and particles, and dry resists depend on similar compounds delivered as vapours. Resist suppliers are therefore moving to secure precursor capabilities. JSR added Yamanaka Hutech, a producer of high-purity precursors for chemical vapour deposition and atomic layer deposition, to its group in August 2024. Adeka announced in November 2025 an investment of about 3.2 billion yen to install mass-production equipment at a factory in Ibaraki Prefecture for metal compounds used as key components of metal oxide resists, with operation planned from April 2028 or later. Filtration and delivery specialists are developing MOR-specific filters and dispense systems, since metal-containing resists interact with filter media differently from organic polymers. Coat-and-develop track makers are adapting bake, cup and bevel-cleaning hardware to handle metal-containing films without contaminating wafers processed later in the same equipment. Handling requirements extend beyond the fab.
Organotin compounds are subject to workplace exposure limits and, for certain uses, to restrictions under the European Union's REACH regulation, so precursor producers and resist formulators must manage synthesis, storage and transport under specific health and safety controls. Waste streams containing tin must be collected and treated separately from conventional organic solvent waste. These requirements favour suppliers with established capabilities in metal-organic chemistry and in managing regulated substances, and they encourage collaboration between resist makers and specialist precursor producers rather than the development of every capability in-house. As a result, the supply chain for advanced EUV resists is becoming more networked, with distinct companies responsible for metal precursors, ligand chemistry, formulation, purification, delivery hardware and deposition equipment, linked by licensing and joint development agreements.
The trend changes the structure of value capture in the market more than its overall size. Equipment makers gain a recurring consumable revenue stream from dry resist precursors, while resist suppliers that align with deposition and etch partners can offer complete patterning stacks rather than single materials. Customers benefit from integrated process solutions but face greater dependence on specific combinations of tool and material, which raises switching costs once a stack is qualified. The trend is most significant for the Dry-Deposited & Hybrid Resists segment, whose growth depends directly on tool installations and partner ecosystems, and for Metal Oxide Resists, whose adoption depends on precursor quality and contamination control. Memory manufacturers, which adopted dry resist first for advanced DRAM, and logic manufacturers preparing High-NA processes for the 2 nm & Below category are the end users most affected. Chemically amplified resists are less directly involved, but CAR suppliers are also co-optimising their products with underlayers, rinses and developers to remain competitive at the tightest pitches. Chipmakers, for their part, are wary of becoming locked into a single tool-and-material combination and tend to favour non-exclusive arrangements that allow them to qualify alternatives.
This preference is reflected in the non-exclusive structure of the recent cross-licensing agreements, which allow each party to continue working with other partners. Over the forecast period, the trend is expected to produce a market in which competitive advantage rests less on a single formulation and more on the ability to deliver a validated combination of resist, underlayer, development process, etch recipe and contamination control, supported by joint data with the customer. Suppliers that can offer this combination, alone or with partners, are likely to gain share on the newest layers, while those that remain purely formulation businesses may find themselves confined to layers where conventional chemistry is sufficient.
PFAS-Free and Sustainability-Driven Reformulation
A second trend is the reformulation of EUV resists and their ancillary chemistries in response to regulatory pressure on per- and polyfluoroalkyl substances (PFAS) and to chipmakers' wider sustainability objectives. Fluorinated chemistry plays several roles in chemically amplified resists. The photoacid generator, the molecule that releases acid when exposed, typically uses a fluorinated sulfonate anion, because fluorination produces a strong acid with controlled diffusion. Fluorinated surfactants improve coating uniformity, and fluorinated components appear in some rinse and anti-collapse solutions used after development. The industry already went through one phase of change when perfluorooctane sulfonate (PFOS) and perfluorooctanoic acid (PFOA) were listed under the Stockholm Convention in 2009 and 2019 respectively, prompting a move toward shorter-chain and partially fluorinated alternatives. Current regulatory proposals define PFAS far more broadly, generally covering any substance containing at least one fully fluorinated carbon atom, which brings many of these replacement chemistries back into scope. Fluorine also has a performance role specific to EUV. Among the light elements that make up organic resists, fluorine absorbs EUV radiation relatively strongly, and some EUV resist designs incorporate fluorinated groups partly to raise absorption and therefore sensitivity.
Removing fluorine is therefore not only a matter of replacing one acid generator with another; it can reduce the efficiency with which the resist captures photons, worsening the stochastic trade-off that already limits performance. This interaction between regulation and lithographic performance is one reason why resist suppliers have argued for specific treatment of semiconductor uses in PFAS rules, and why reformulation programmes must test not only acid strength and diffusion but also dose, roughness and defectivity on EUV scanners. The task is to find chemistries that meet both regulatory and performance requirements at the same time.
The European Union's proposed universal PFAS restriction under REACH is the most important driver of this trend. The proposal was submitted in January 2023 by authorities in Denmark, Germany, the Netherlands, Norway and Sweden. An updated version published by the European Chemicals Agency on 20 August 2025 introduced alternative restriction options for certain sectors, including electronics and semiconductors, under which continued use could be allowed subject to operating conditions and emission controls rather than banned outright. ECHA's Committee for Risk Assessment adopted its final opinion on 2 March 2026, and its Committee for Socio-Economic Analysis agreed a draft opinion on 10 March 2026, followed by a public consultation that ran from 26 March to 25 May 2026. In the results briefing published in June 2026, electronics and semiconductors was the most frequently named industry sector among the comments received. The socio-economic committee is targeting a final opinion by the end of 2026, after which the European Commission will prepare a decision.
In the United States, the Environmental Protection Agency finalised a rule in April 2026 moving the start of reporting under TSCA section 8(a)(7) to 31 January 2027 or 60 days after the effective date of a revised reporting rule, whichever is earlier, keeping PFAS data obligations in view for manufacturers and importers of fluorinated resist components. The details of the European process matter greatly for resist suppliers. The August 2025 update to the proposal indicated that some uses could benefit from longer phase-out periods of up to 13.5 years, and alternative options based on emission controls were considered for electronics and semiconductors, but the final scope of any derogation for photolithography will only be known after the committees deliver their opinions and the Commission and Member States decide on the measure. Until then, suppliers must plan for a range of outcomes, from conditional continued use with strict emission controls to time-limited derogations followed by substitution. Because qualification of a new formulation can take years and must be aligned with customers' node schedules, the uncertainty itself encourages early action, and many suppliers have chosen to develop PFAS-free alternatives in parallel with their existing products rather than wait for the final rules.
The value chain of the EUV photoresists market runs from specialty raw materials through resist manufacturing and distribution to the fabs where resist is consumed. It differs from the value chain of most chemical products in three respects. First, physical volumes are small at every stage, while purity and consistency requirements are extreme, so value is created mainly by know-how, control and qualification rather than by scale of production. Second, every stage is linked to the end user through qualification: a change to a raw material, a production site or a filtration step can require the customer to re-qualify the resist, so the chain is more rigid than its physical simplicity suggests. Third, the chain is splitting into two forms. Liquid resists, including chemically amplified and metal oxide resists, follow the traditional path of synthesis, formulation, filtration and bottling. Dry-deposited resists follow a path in which the precursor chemistry is delivered to a deposition tool and the resist film is formed inside the chipmaker's fab, which brings the equipment supplier into the centre of the chain.
The first stage, raw materials, differs by resist type. Chemically amplified resists are built from a polymer backbone, typically derived from hydroxystyrene or methacrylate monomers carrying acid-labile protecting groups, combined with a photoacid generator, a quencher and one or more solvents and surfactants. Photoacid generators are commonly onium salts such as triarylsulfonium compounds, paired with sulfonate anions that are often fluorinated to produce a strong acid with controlled diffusion. Quenchers are base compounds or, increasingly, photo-decomposable molecules that neutralise stray acid. Solvents such as propylene glycol monomethyl ether acetate (PGMEA) and propylene glycol monomethyl ether make up most of the volume of a formulation and must themselves be of electronic grade. Many of these inputs are produced by a small number of specialist chemical companies, a large proportion of them in Japan, such as Toyo Gosei for photosensitive materials, and in some cases resist makers synthesise key components in-house to protect proprietary structures. Metal oxide resists replace the polymer and photoacid generator with metal-oxo clusters, most commonly based on tin, surrounded by organic ligands that control solubility and sensitivity. Their raw materials include refined tin and organotin intermediates, ligand precursors and high-purity solvents. Dry-deposited resists rely on volatile metal-organic precursors and co-reactants supplied in sealed canisters suitable for vapour delivery.
The value added at the raw material stage lies in molecular design and purity. A photoacid generator or monomer intended for EUV resist must be synthesised with tightly controlled structure and must contain trace metals at levels measured in parts per billion or lower before formulation, since metals in the final resist can cause defects and device failures. For metal oxide and dry resists, the precursor must contain the intended metal at high purity while excluding other metals that would contaminate devices. Producing these materials consistently requires dedicated equipment and analytical capability, which limits the number of qualified sources. Resist suppliers have responded by securing access to critical inputs: JSR added Yamanaka Hutech, a producer of high-purity deposition precursors, to its group in August 2024, and Adeka is installing mass-production equipment in Ibaraki Prefecture for metal compounds used in metal oxide resists, with operation planned from 2028. Dependence at this stage is significant, because a single qualified source for a photoacid generator or tin precursor can become a bottleneck for several resist products at once.
The second stage, manufacturing, is where the largest share of value is created. For chemically amplified resists, manufacturing begins with the polymerisation of monomers into a polymer of controlled molecular weight and narrow molecular-weight distribution, followed by purification to remove residual monomer, catalysts and metals. The polymer, photoacid generator, quencher and additives are then dissolved in solvent in precise proportions under cleanroom conditions. The formulated resist passes through multiple stages of filtration, using membranes with pore ratings in the few-nanometre range, and may be treated with ion-exchange media to reduce metal content further. It is then filled into specially cleaned containers under inert gas. Metal oxide resists follow a similar formulation and filtration route but require additional controls to prevent unwanted reactions of the metal clusters with moisture and to manage interactions with filter media. Each production lot is tested for composition, viscosity, film thickness, trace metal content, particle counts and, for EUV products, lithographic performance, often by coating and exposing test wafers on EUV or EUV-equivalent tools. Leading suppliers operate dedicated EUV resist plants and development centres, including JSR's facilities in Yokkaichi, Mie Prefecture, and in Leuven, Belgium, TOK's plants in Kawasaki and Koriyama, Shin-Etsu's sites in Niigata, Fukui and Yunlin County in Taiwan, and Sumitomo Chemical's Osaka Works.
The manufacturing stage adds value through formulation intellectual property, process control and qualification history. Formulations are designed for specific layers and customers, and their performance depends on small details of composition and processing that are protected as trade secrets as well as by patents. Batch-to-batch consistency is as important as absolute performance, because chipmakers calibrate their processes to a specific resist and cannot tolerate drift. Suppliers therefore maintain extensive statistical process control, retain samples from each lot and follow formal change-notification procedures agreed with each customer, under which any change to raw materials, equipment or site must be notified and often approved in advance. These procedures, together with the cost of EUV-based testing, form a substantial part of the cost of producing EUV resist and a major barrier to new entrants.
For dry-deposited resists, the manufacturing stage is divided between the precursor producer and the equipment supplier. The precursor chemistry is manufactured, purified and packaged in canisters by the chemical supplier or by the equipment company's supply partners, while the resist film itself is created inside the deposition chamber at the fab, using process recipes developed by the equipment maker together with the chipmaker. In Lam Research's Aether model, the equipment supplier controls the deposition and dry development hardware and the process knowledge, and the consumable precursor becomes part of a combined tool-and-chemistry offering. This arrangement shifts part of the value that traditionally accrued to resist formulators toward the equipment supplier, and it explains why resist makers such as JSR have sought cross-licensing and collaboration agreements with Lam rather than competing independently in dry resist.
The third stage, distribution, is short and closely managed. Most EUV resist is sold directly by the producer to the chipmaker, through the producer's local subsidiary in each customer country, rather than through general chemical distributors. In some markets, specialist semiconductor materials distributors play a role in logistics, warehousing and local service, and Wah Lee Industrial in Taiwan, which became a partner in JSR's Taiwan manufacturing joint venture in April 2026, is an example of a distributor moving into production. Resist is shipped as hazardous goods because of its flammable solvents, usually under temperature control, and must be used within its specified shelf life. Chipmakers typically hold limited on-site inventory and rely on suppliers to maintain buffer stocks nearby, sometimes under vendor-managed inventory arrangements. Distribution adds value through supply assurance, the speed with which replacement lots can be delivered, documentation such as certificates of analysis for each lot and resident technical service engineers who support the customer's process teams. As suppliers build local finishing and quality-control capacity in South Korea, Taiwan and, increasingly, the United States, the distribution stage is merging with local manufacturing. The commercial arrangements at this stage are also distinctive.
Pricing is negotiated directly between supplier and chipmaker, usually per product and layer, and is often tied to volume commitments and to service-level obligations covering delivery times, inventory and response to quality issues. Contracts commonly specify the production sites from which a qualified product may be supplied, so a supplier cannot freely move production between plants without the customer's agreement. For dry resist, the distribution of precursor canisters is linked to the service network of the equipment supplier, which installs, maintains and supports the deposition tools in the fab. In both cases, the distribution stage is less about moving product than about maintaining an uninterrupted, documented and qualified supply to a small number of highly demanding sites.
The fourth stage comprises the end users: foundries, logic IDMs and memory manufacturers that consume EUV resist in their lithography modules, together with the research institutes and pilot lines that consume it during development. At the fab, resist is dispensed on coat-and-develop tracks connected to EUV scanners, with dispense systems, point-of-use filters and bake units configured for each product. End users add value by integrating the resist into a complete patterning process, tuning exposure, bake and development conditions, and linking resist performance to device yield. They are also the main source of performance requirements for the rest of the chain, because each new node and DRAM generation begins with the chipmaker's specification for resolution, roughness, dose and defectivity on specific layers. Research institutes such as imec in Leuven, the Albany NanoTech Complex in New York and CEA-Leti in Grenoble occupy an important intermediate position, providing early access to EUV and High-NA EUV exposure for suppliers and chipmakers and generating shared data that shapes which resist platforms are taken forward. ASML also participates as an ecosystem partner, since resist performance determines how productive its scanners can be in customer fabs.
The value captured at the end-user stage is far larger than the value of the resist itself, since a single EUV layer contributes to the patterning of devices worth many times the cost of the materials consumed. This asymmetry shapes behaviour throughout the chain. Chipmakers are willing to pay premium prices for resist that improves yield or allows lower exposure doses, because the benefit in wafer output and device value is far greater than the material cost. They are equally unwilling to risk a supplier change that could jeopardise yield, which is why qualified positions are durable. Feedback from end users also flows back up the chain: defect findings, yield data and process changes at the fab lead to formulation adjustments at the resist maker and, in turn, to changes in specifications for raw materials, creating a continuous cycle of improvement that links all four stages.
The main dependencies in the chain are therefore concentrated at a few points. Specialty inputs such as photoacid generators, high-purity monomers and tin precursors depend on a small number of qualified producers. Formulation and lot-release capability for EUV resists is concentrated among a handful of suppliers, most headquartered in Japan. Access to EUV exposure for development and testing depends on scanners from a single equipment maker and on a limited number of research facilities. Customer qualification ties each resist to a specific site and process, so disruption at any qualified plant cannot be quickly offset by another supplier. These dependencies explain why governments and chipmakers have focused on the resist supply chain as a strategic issue, and why investments in local plants, alternative sources and partnerships between materials and equipment suppliers have accelerated since 2024. Looking ahead, the distribution of value along the chain is expected to shift in two directions. The growth of metal oxide and dry resists will increase the importance of metal precursor producers and of equipment suppliers relative to traditional polymer and photoacid generator producers. At the same time, the localisation of finishing and quality control near customer fabs will move part of the manufacturing value from the suppliers' home countries to the customers' locations, even as core synthesis and formulation know-how remains concentrated at the suppliers' central development and production sites.
The regulatory environment for EUV photoresists spans chemical safety law, environmental regulation of specific substance groups, export controls and industrial policy. Because resist suppliers sell the same or closely related products to customers in several jurisdictions, the most restrictive requirement in any major market often shapes product design worldwide. Regulation affects the market at several points: new photoacid generators, ligands and precursors must be notified or registered before commercial use in each country; existing substances may be restricted or subjected to reporting; workplace and environmental rules determine how resist plants and fabs handle solvents and metal compounds; and trade rules govern which customers can be supplied. For a product developed over several years and qualified for long production lives, regulatory lead times are an important planning factor.
In Japan, the principal chemical framework is the Act on the Evaluation of Chemical Substances and Regulation of Their Manufacture, commonly known as the Chemical Substances Control Law, which requires notification and evaluation of new chemical substances before manufacture or import and imposes controls on substances found to be persistent, bioaccumulative or toxic. The Industrial Safety and Health Act governs workplace handling of chemicals and was amended to introduce a system of autonomous chemical risk management by employers, with major provisions taking effect in April 2024, which affects how resist plants assess and control exposure to solvents and metal compounds. Exports are governed by the Foreign Exchange and Foreign Trade Act, under which Japan's Ministry of Economy, Trade and Industry sets licensing requirements; the July 2019 tightening of procedures for EUV resists exported to South Korea was implemented under this law and was reversed in 2023. Japan's Economic Security Promotion Act of 2022 designated semiconductors among specified critical products, providing the legal basis for government support of supply-chain resilience, including materials. Japan's regulatory system is particularly important for this market because most EUV resist formulations and many of their key components are first manufactured there.
Changes to Japanese chemical notification requirements or export licensing therefore affect supply to every region, and Japanese suppliers typically use their domestic regulatory approvals as the starting point for registrations in South Korea, Taiwan, the United States and Europe. The government's active role in the sector, including financial support for Rapidus and subsidies for EUV-based capacity at Micron's Hiroshima site, also means that industrial and regulatory policy are closely coordinated.
In the United States, chemical regulation falls primarily under the Toxic Substances Control Act, administered by the Environmental Protection Agency. New chemical substances, including novel photoacid generators or metal-organic precursors, require pre-manufacture notification before commercial production or import, and EPA can impose conditions on their use. The TSCA section 8(a)(7) rule, finalised in October 2023, requires manufacturers and importers of PFAS, including PFAS in articles, to report information on uses, volumes and hazards for each year since 2011; in April 2026 EPA finalised a rule moving the start of the submission period to 31 January 2027 or 60 days after the effective date of a revised rule, whichever is earlier, while it completes changes proposed in November 2025 that would add exemptions such as a de minimis concentration threshold. Workplace chemical communication is governed by OSHA's Hazard Communication Standard, which was updated in May 2024 to align more closely with the United Nations Globally Harmonized System. Export controls under the Export Administration Regulations, administered by the Bureau of Industry and Security, restrict exports of advanced semiconductor manufacturing items to China and other destinations under rules issued in 2022, 2023 and 2024.
Industrial policy is set by the CHIPS and Science Act of 2022, which funds manufacturing incentives, including for materials suppliers, and by the Section 232 proclamation of January 2026, which imposed tariffs on a narrow set of advanced chips and signalled possible broader measures with a tariff offset programme for U.S. investment. State legislation adds a further layer for PFAS. Minnesota's law on PFAS in products, for example, began restricting intentionally added PFAS in certain product categories from January 2025 and provides for a broad prohibition from 2032 subject to determinations that a use is currently unavoidable, and other states have adopted reporting or restriction requirements. Although these laws are aimed mainly at consumer products, they contribute to an environment in which suppliers of fluorinated industrial chemicals face rising disclosure obligations and in which customers seek to reduce PFAS content across their supply chains.
In the European Union, the REACH regulation requires registration of substances manufactured or imported above one tonne per year, together with evaluation, authorisation and restriction procedures, and its Annex XVII already restricts certain organotin compounds in specified applications. The Classification, Labelling and Packaging Regulation governs hazard classification of resist components and finished formulations. The proposed universal PFAS restriction under REACH is the most significant pending measure for resist suppliers: ECHA's Committee for Risk Assessment adopted its opinion in March 2026, the Committee for Socio-Economic Analysis consulted on its draft opinion between March and May 2026 and is targeting a final opinion by the end of 2026, after which the European Commission will propose a decision to Member States. Export controls are governed by the Dual-Use Regulation (EU) 2021/821, under which Member States such as the Netherlands license exports of advanced lithography equipment. Industrial policy is set by the European Chips Act, Regulation (EU) 2023/1781, which entered into force in September 2023, and by the Chips Act 2.0 proposal presented by the Commission on 3 June 2026, which would replace it and is now in the ordinary legislative procedure.
In South Korea, the Act on the Registration and Evaluation of Chemicals, known as K-REACH, and the Chemicals Control Act regulate the registration and safe handling of chemical substances. An amendment to K-REACH raised the annual volume threshold above which new chemical substances must be registered from 0.1 tonne to one tonne, with effect from January 2025, easing requirements for low-volume specialty chemicals such as resist components. South Korea also applies workplace and accident-prevention rules to hazardous chemicals handled at fabs and materials plants, reinforced after chemical accidents in the 2010s, which shape the design of local resist finishing facilities such as those built by JSR, TOK and Fujifilm. The government's policy of supporting domestic and foreign-invested materials production, maintained since 2019, has been implemented through investment incentives and permitting support rather than through restrictions on imports. The Foreign Trade Act provides the basis for South Korea's strategic goods export controls. Taiwan regulates chemicals under the Toxic and Concerned Chemical Substances Control Act and requires registration of new chemical substances under its occupational safety framework, while its strategic high-tech commodities export control regime was extended in June 2025 when Huawei and SMIC were added to Taiwan's entity list.
In China, new chemical substances must be registered with the Ministry of Ecology and Environment under the Measures for Environmental Management Registration of New Chemical Substances, which took effect in January 2021, and exports are controlled under the Export Control Law of 2020 and the dual-use export control regulations that took effect in December 2024, which China invoked in January 2026 when it tightened dual-use exports to Japan.
At the international level, the Stockholm Convention on Persistent Organic Pollutants has listed perfluorooctane sulfonic acid and its salts since 2009 and perfluorooctanoic acid since 2019, which drove the earlier shift away from long-chain fluorinated chemistry in photolithography materials. The Wassenaar Arrangement provides a common reference for national dual-use control lists. Industry standards complement regulation: SEMI publishes standards for the purity and packaging of process chemicals and for environmental, health and safety aspects of semiconductor manufacturing, and chipmakers impose their own specifications on trace metals, particles and change notification that in practice are more demanding than any legal requirement.
The current status of these measures points to a period of rising regulatory obligations during the forecast period. The European PFAS restriction is the measure most likely to require changes to resist formulations, with its scope for semiconductor uses still to be determined after the committee opinions are delivered. U.S. PFAS reporting under TSCA is expected to begin no later than early 2027, requiring suppliers and importers to compile historical data on fluorinated components. Export control regimes have expanded steadily since 2022 and are unlikely to be relaxed in the near term, while new industrial policies, including the EU Chips Act 2.0 proposal and India's Semicon 2.0 framework approved in July 2026, are shifting from capacity creation toward supply-chain resilience, design and demand measures that may include provisions on critical materials. For resist suppliers, compliance capability, including registration expertise in multiple jurisdictions, substance tracking and the ability to reformulate, is becoming a competitive factor in its own right.
The period from 2024 to 2026 has been particularly active for the leading companies in the market, with a concentration of plant investments in South Korea, Taiwan and Japan and a series of partnerships linking resist chemistry with equipment and purification technology. Table 10.2 records confirmed product launches, mergers and acquisitions, partnerships and expansions by these companies from 2022 onward, listed in date order.
2 Aug 2022: JSR Corporation; Partnership; Accelerated co-development with SK hynix to apply Inpria's EUV metal oxide resist to the manufacture of advanced DRAM.
8 Aug 2023: Tokyo Ohka Kogyo (TOK); Expansion; Decided to build a new photoresist manufacturing building at its Koriyama Plant in Fukushima Prefecture, scheduled to start operation in the second half of 2026.
9 Apr 2024: Shin-Etsu Chemical; Expansion; Announced a new production base for semiconductor lithography materials, including EUV resists, in Isesaki, Gunma Prefecture, with an investment of about 83 billion yen.
22 May 2024: Qnity Electronics; M&A; DuPont announced its plan to separate its electronics business, including lithography materials, into an independent company, later named Qnity Electronics.
30 Aug 2024: JSR Corporation; Expansion; Decided to build a metal oxide resist final-production plant at JSR Micro Korea and a new MOR research and development centre in the Kanto area of Japan.
29 Oct 2024: Fujifilm; Product Launch; Launched negative-tone EUV resists and an EUV developer, with expanded production and quality evaluation at its Shizuoka and Pyeongtaek sites from October 2025.
12 Nov 2024: JSR Corporation; Expansion; Held the groundbreaking ceremony for its metal oxide resist plant in the Ochang industrial complex, Cheongju, South Korea.
29 Jan 2025: Lam Research; Product Launch; Announced that its Aether dry photoresist technology was selected by a leading memory manufacturer as production tool of record for advanced DRAM.
20 Aug 2025: Tokyo Ohka Kogyo (TOK); Expansion; Broke ground on the TOK Advanced Materials plant in Pyeongtaek, South Korea, for high-purity chemicals and photoresists.
16 Sep 2025: JSR Corporation and Lam Research; Partnership; Entered a non-exclusive cross-licensing and collaboration agreement covering dry resist, metal oxide resists and High-NA EUV patterning.
1 Nov 2025: Qnity Electronics; M&A; Completed its separation from DuPont and began trading as an independent company on the New York Stock Exchange.
23 Feb 2026: Tokyo Ohka Kogyo (TOK) and Irresistible Materials; Partnership; TOK made a strategic investment in Irresistible Materials and agreed to co-develop its Multi-Trigger Resist platform for EUV lithography.
10 Mar 2026: Lam Research; Partnership; Announced a five-year collaboration with IBM to develop High-NA EUV processes and Aether dry resist for sub-1 nm logic at the Albany NanoTech Complex.
10 Apr 2026: JSR Corporation; Partnership; Established JSR Micro Advanced Manufacturing Taiwan, a joint venture with LCY Chemical and Wah Lee Industrial, as a manufacturing base for advanced electronic materials.
26 May 2026: JSR Corporation; Partnership; JSR and Inpria entered a non-exclusive cross-licensing agreement with Entegris covering metal oxide resist patents and future photoresist collaboration.
30 Sep 2026: JSR Corporation; Expansion; Completed construction of its metal oxide resist plant at JSR Micro Korea in Ochang, its first production base dedicated to MOR.
The pattern of developments shows three themes. Plant investments are concentrated near customers in South Korea and Taiwan and in new domestic capacity in Japan. Partnerships increasingly link resist makers with equipment, purification and research partners, particularly around metal oxide and dry resists. Corporate changes, including Qnity's separation from DuPont and the reported plan for Mitsui Chemicals to acquire JSR, indicate that ownership of the sector's key assets is in flux as the market's strategic importance grows.
Political factors exert a strong influence on the EUV photoresists market because the product sits at the intersection of semiconductor industrial policy and economic security. Governments in the United States, Japan, South Korea, Taiwan, the European Union, China and India all treat advanced semiconductor manufacturing as strategic, and they support it with subsidies, tax incentives and procurement measures that determine where EUV-equipped fabs are built. At the same time, export controls on lithography equipment define which countries can use EUV at all, and trade frictions, particularly between Japan and China from late 2025, have raised the possibility that materials such as photoresist could become instruments of policy. For resist suppliers, political factors shape the location of demand, the need for local production and the risk attached to cross-border supply. Political involvement also extends to ownership: the Japanese government, through the state-backed Japan Investment Corporation, took JSR private in 2024 with the stated aim of driving consolidation in semiconductor materials, and the reported plan to sell JSR to Mitsui Chemicals in November 2026 keeps the company in Japanese hands. Host governments, in turn, actively court resist producers, as South Korea's trade ministry did in supporting JSR's Ochang plant.
The European Union's Chips Act 2.0 proposal and India's Semicon 2.0 framework, both presented in 2026, show that political attention to the semiconductor supply chain is broadening from fabrication to materials, design and demand, which is likely to keep lithography materials on policy agendas throughout the forecast period.
Economic factors operate mainly through the investment cycle of leading-edge chipmakers. Demand for EUV resist rises with capital spending on EUV-equipped capacity and with utilisation of that capacity, both of which have been driven since 2023 by AI-related demand for logic and HBM. The memory market cycle introduces volatility, as DRAM makers can reduce wafer starts quickly when prices fall. Currency movements matter because much EUV resist is produced in Japan and priced for export, and the weak yen of 2024–2026 affected both supplier margins and the cost of overseas investment. Inflation in energy, labour and construction costs has raised the cost of building new resist plants in the United States, Japan and South Korea. Interest rates and the cost of capital influence the pace at which chipmakers and suppliers commit to new fabs and plants, and government grants and tax credits have offset part of this cost in most producing countries. For chipmakers, resist represents a small share of wafer cost, so economic pressure tends to focus on performance per unit of scanner time rather than on resist price alone. The concentration of demand in AI-related products introduces a further economic consideration: if investment in AI infrastructure slows, the effect would be felt quickly in leading-edge logic and HBM wafer starts, the segments that consume most EUV resist. Conversely, continued growth in AI computing supports sustained high utilisation of EUV capacity and investment in new nodes.
Social factors are most visible in talent and in public attitudes to chemicals. The resist industry depends on synthetic chemists, polymer scientists, analytical specialists and lithography engineers, and competition for these skills has intensified as fabs and materials plants open in new locations, including Arizona, Texas, Hokkaido, Kumamoto and Gujarat. Japan's ageing workforce and the limited pool of materials specialists in the United States are constraints on capacity expansion. Public concern about PFAS contamination, reflected in litigation and settlements in the United States and in European regulatory activity, has made fluorinated chemistry a reputational as well as a regulatory issue for suppliers and their customers. Community expectations about environmental performance also affect the permitting of new plants that handle solvents and metal compounds. Social demand for digital services, including generative AI applications, cloud computing and connected devices, underlies the investment that drives the market, and public support for domestic semiconductor manufacturing in many countries has made it easier for governments to fund fabs and materials plants. Training programmes in Japan, South Korea, Taiwan, the United States and India aim to expand the specialised workforce, but their effect on supply takes years to materialise.
Technological factors are the most direct determinants of market development. The progression of logic nodes to 2 nm and below, the move of DRAM to 1c and later generations, the adoption of gate-all-around transistors and backside power delivery, and the arrival of High-NA EUV scanners all increase the number and difficulty of EUV layers. Advances in resist chemistry, including metal oxide resists, dry-deposited resists and new mechanisms such as multi-trigger chemistry, are changing the composition of the market. Supporting technologies matter as well: higher-power EUV sources, improved masks and absorbers, better underlayers and rinses, and faster defect inspection all affect resist requirements. Research consortia such as imec and the Albany NanoTech Complex play a central role in accelerating these developments and in reducing the time from laboratory result to production qualification. Computational methods are also beginning to influence resist development, as suppliers use simulation of photon absorption, electron scattering and reaction kinetics, together with data-driven screening of candidate molecules, to narrow the range of formulations that must be tested on EUV scanners. Inspection and metrology improvements, including higher-throughput e-beam systems, allow stochastic defects to be measured more efficiently, shortening the feedback loop between resist design and performance evaluation.
The pace of technological change also creates risk for suppliers: a chemistry that wins positions at one node can be displaced at the next if a competitor's platform proves better suited to thinner films, higher absorption or High-NA imaging, so sustained investment in next-generation materials is a condition of remaining in the market rather than an optional growth strategy.
Environmental factors centre on chemical management and resource use. Resists contain organic solvents, which must be handled and disposed of safely, and many chemically amplified resists contain fluorinated components that fall within broad PFAS definitions. Metal oxide and dry resists introduce tin and other metals into fab waste streams, requiring separate collection and treatment. Chipmakers' targets for emissions, water use and waste reduction extend to their suppliers, who are asked to provide product carbon footprints and to reduce solvent consumption. Dry resist processes are promoted for lower chemical and energy use, and resist suppliers are developing PFAS-free formulations and supporting solvent recovery. EUV scanners themselves consume large amounts of electricity, so resist chemistries that allow lower exposure doses also contribute indirectly to lower energy use per wafer. Upstream, the sourcing of tin raises questions of responsible mineral supply, since tin is one of the conflict minerals addressed by due diligence rules in the United States and the European Union, and resist makers using tin-based chemistries must be able to document the origin of their metal supply.
Legal factors include chemical regulation, intellectual property and contract law. Chemical laws in each producing and consuming country, including REACH and CLP in the European Union, TSCA in the United States, the Chemical Substances Control Law in Japan, K-REACH in South Korea and new substance registration rules in China and Taiwan, determine which substances can be produced, imported and used, and under what conditions. Intellectual property is particularly important in EUV resists, where patents on metal oxide chemistries and dry resist processes have been the subject of litigation, inter partes review challenges and, more recently, cross-licensing settlements such as those between JSR/Inpria and Lam Research in 2025 and between JSR/Inpria and Entegris in 2026. Export control and sanctions laws govern which customers suppliers can serve, and supply agreements between resist makers and chipmakers increasingly include provisions on multi-site supply, inventory, change notification and business continuity. Competition law is also relevant as the industry consolidates, since any acquisition involving a leading resist maker may require merger control review in several jurisdictions where its customers are located, and trade secret protection has become more important as technical staff move between suppliers, chipmakers and new entrants in different countries.
Profiles of 31 companies operating in the EUV Photoresists Market market, including revenue, employee count, and market positioning where available.
Showing 31 of 31 companies
JSR Corporation is a Tokyo-headquartered specialty-materials company. Its centre of gravity is now unambiguously semiconductor electronic materials: - lithography photoresists, including ArF-immersion and EUV chemically amplified resists, and Inpria's metal-oxide resists (MOR); - multilayer/spin-on hard-mask materials, CMP slurries, cleaning solutions, and advanced-packaging dielectrics and thick resists; - since 2024, Yamanaka Hutech's CVD/ALD precursors. These sit alongside two other businesses: - **Display Solution**, where JSR claims the world's No. 1 share in LCD alignment, passivation and overcoat films; - **Optical Solution**, covering ARTON heat-resistant transparent resin and NIR-cut filters. A legacy Plastics business (Techno-UMG ABS/AES/ASA) and a shrinking Life Sciences segment, now essentially the KBI Biopharma/Selexis CDMO plus residual CRO, make up the rest. The JIC take-private in 2024 was framed as a platform for consolidating Japan's fragmented chip-materials industry. Instead, 2025–26 has been a period of radical pruning. Non-core life-science, emulsion, 3D-printing and healthcare assets were sold. Electronic materials delivered record profits on AI-driven demand. Management targets ¥100bn core operating profit by FY2030. Reuters reported in May 2026 that JIC is weighing an exit, with Fujifilm and Mitsubishi Chemical named as interested parties. --- ### Company's own description (Annual Report 2026, segment note) The AR2026 states that the Group "is primarily engaged in the Digital Solutions business, the Plastics business and the Life Sciences business." It defines three reportable segments: **Digital Solutions:** manufactures and sells Electronic Materials, display materials and optical-solution materials. - Electronic Materials: lithography materials (photoresists, multilayer materials), mounting materials, cleaning solutions, CMP materials. - Display Materials: materials for colour LCDs and functional coating materials. - Optical Solution Materials: heat-resistant transparent resins and functional films; photo-fabrication and photo-moulding systems. **Plastics:** manufactures and sells ABS and other resins (ABS, AES, AS, ASA) for automobiles, office equipment and amusement applications. **Life Sciences:** provides drug discovery and development services. The website's business-domain page adds Deposition Materials (CVD/ALD precursors from Yamanaka Hutech) and Advanced Electronic Materials to the Electronic Materials scope. It describes Life Sciences as CDMO and CRO services. ### Independent characterisation JSR is a product (materials) company. Revenue is overwhelmingly recognised at the point of delivery of formulated chemicals. Only the Life Sciences CDMO/CRO activities are service revenue recognised over time. Revenue-model mix: **Products:** about 80% of continuing FY2025 revenue (Digital Solutions + Plastics + Other = ¥352.3bn of ¥440.7bn). **Services:** about 20% (Life Sciences CDMO/CRO, ¥88.4bn). This share will fall further after the Crown Bioscience CRO exit, which was expected to close mid-calendar 2026. **Licensing/royalty:** not separately disclosed, but strategically important. Inpria's MOR patent estate now underpins cross-licences with Lam Research (Sep 2025) and Entegris (May 2026). Contract liabilities rose to ¥34.0bn at FY2025 year-end from ¥21.5bn, which may include prepayments under such arrangements; this is not disclosed. **Subscription:** none. **Value-chain position.** JSR is a Tier-1 materials supplier sitting immediately upstream of wafer fabs and of LCD/OLED panel makers. In lithography it formulates resists from purchased polymers, photo-acid generators and solvents. It co-optimises them with scanner (ASML) and track/etch (Lam, Tokyo Electron) toolsets, and qualifies them at each customer node. That qualification creates high switching costs. Inpria's MOR technology moves JSR into the newest EUV patterning layer. Yamanaka adds precursor chemistry for deposition steps. Together these broaden JSR's "share of wafer" beyond lithography. **Customer types.** - Leading-edge logic foundries and memory makers in Taiwan, South Korea, the US, Japan and China. No customer exceeds 10% of revenue (AR2026 segment note). - OSAT and advanced-packaging houses. - LCD/OLED panel makers, predominantly in China. - Smartphone camera-module makers (NIR filters). - Automotive tier-1s and appliance OEMs (ABS). - Biopharma and biotech sponsors (CDMO/CRO). **End-markets.** Semiconductors (AI/HPC logic, HBM/DRAM, NAND), flat-panel displays, mobile devices and image sensors, automotive, consumer electronics, and biopharmaceuticals.
Irresistible Materials is a UK-based, venture- and strategically-backed developer of next-generation photoresists for extreme ultraviolet (EUV) lithography, the patterning step that defines the smallest features on leading-edge logic and memory chips. Its core asset is the patented Multi-Trigger Resist (MTR™), a metal-free, small-molecule negative-tone resist chemistry that the company says has molecules up to ten times smaller than conventional polymer resists, and that uses a multi-step activation mechanism to limit acid diffusion and the stochastic blur that limits conventional chemically amplified resists (CARs). MTR is positioned as a third resist platform alongside CARs and metal-oxide resists (MORs), aimed at both today's 0.33-NA EUV scanners and ASML's 0.55 high-NA tools. In October 2025 Tokyo Ohka Kogyo (TOK), one of the three suppliers that dominate the EUV resist market, became its controlling-interest shareholder and joint development partner. In June 2026 IM sold its LiquidCarbon™ spin-on-carbon patents to Nano-C so that it could focus only on MTR. The company is pre-revenue at scale, has around ten employees, and is preparing to sample customers and scale up manufacturing. **What the company does.** Irresistible Materials designs, formulates and optimises photoresist chemistries for EUV lithography at 13.5 nm wavelength. A photoresist is the light-sensitive film spun onto a wafer that records the pattern projected by the scanner. Resist performance governs three linked variables: resolution (how small a feature can be printed), line-edge and line-width roughness (LER/LWR), and sensitivity (the dose needed, which drives scanner throughput). At EUV wavelengths these three trade off against each other because of photon shot noise and resist chemistry. IM's whole strategy rests on the claim that its MTR mechanism loosens that trade-off. **Company's own description.** In its February 2026 joint release with TOK, IM describes itself as a pioneering electronic materials technology company that develops advanced photoresists for next-generation EUV lithography. It says its patented MTR offers better imaging performance for low-NA and high-NA EUV than competing solutions on several criteria, and that integrated device manufacturer (IDM) and foundry customers can get higher yields and lower cost of ownership (CoO) for logic and memory devices. The website frames the mission as developing resists that behave predictably under EUV exposure, which improves throughput, CoO and yield, and as moving technologies from research into manufacturing alongside semiconductor customers and partners. **Independent characterisation.** IM is a deep-technology IP and formulation company that has not yet reached commercial scale. For more than a decade it has developed a non-polymeric (molecular) resist family and has tested it on industry-standard tools, including ASML NXE scanners through imec, the Paul Scherrer Institute (PSI) EUV interference lithography beamline and the Berkeley micro-exposure tool (MET). Manufacturing has always been outsourced: first to Nano-C, Inc. (Westwood, Massachusetts), and since 2025–26 increasingly through TOK's ISO-certified photoresist manufacturing and quality systems. Commercially it is at the qualification and sampling stage. Chipmakers spend several years qualifying resists layer by layer and node by node before volume adoption. **Business and revenue model.** Since its earliest public statements, the model has changed in three stages: **2014–2017:** Stated model: IP licensor to established resist suppliers, while behaving like a resist supplier to win scanner time and customer evaluations; Evidence: Co-founder David Ure told EE Times Europe (2017) that IM's primary model would be licensing IP to resist suppliers **2015–2026 (spin-on carbon):** Stated model: Licensing and distribution through a channel partner, with material made by Nano-C; Evidence: 2015 licence with MicroChem Corp. for sale and distribution of IM spin-on-carbon materials **2025 onward:** Stated model: Co-development and commercialisation with a strategic resist major (TOK), with TOK adding MTR to its resist portfolio and manufacturing it for high-volume manufacturing (HVM); Evidence: February 2026 IM–TOK joint release The revenue mix between product sales, development fees, licensing royalties and grants is not publicly disclosed. As a small company, IM files abridged accounts that do not include a profit and loss account, and turnover is unreported. Historically, non-dilutive income has included UK government grants (Technology Strategy Board / Innovate UK and the UKRI grant programme). **Value chain position.** IM sits upstream in the lithography materials chain: **Fine chemical / precursor synthesis:** Participants: Specialty chemical makers (e.g., Nano-C for fullerene and molecular components); IM role: Specifies and sources components; resist has four or five elements (CEO interview, March 2025) **Resist formulation and optimisation:** Participants: TOK, JSR/Inpria, Shin-Etsu, Fujifilm, Sumitomo Chemical, Dongjin Semichem, DuPont, IM; IM role: Core activity: custom formulations per layer and customer **Resist manufacturing and QC at volume:** Participants: Resist majors with ISO-certified plants; IM role: Through TOK (from 2025–26) and Nano-C **Process integration and evaluation:** Participants: imec, ASML, Albany NanoTech EUV Accelerator, PSI, Berkeley Lab; IM role: Testing partner relationships **Device manufacturing:** Participants: Logic foundries, IDMs, DRAM makers; IM role: Target end customers **Customer types.** The targets are leading-edge IDMs and foundries running EUV lithography for logic and memory. In 2018 eeNews Europe reported that IM was supplying Intel, Samsung and GlobalFoundries, and had dealings with TSMC, for evaluation material. The company has not named any current production customer. In March 2025 the CEO said chipmakers were going through material qualification and that IM expected engagement opportunities over 2025–2026. **End markets served.** These are advanced logic (3 nm-class and below, A14/A10 nodes), DRAM moving towards EUV and high-NA, and, through spin-on carbon historically, MEMS, 3D chip structures and hard-mask applications. Demand comes ultimately from AI accelerators, data-centre CPUs, HBM/DRAM and premium mobile processors.
Lam Research is the world's third-largest wafer fabrication equipment (WFE) supplier by revenue and the leading specialist in plasma etch and a top-tier supplier of deposition, the two process steps that build and sculpt the three-dimensional structures inside modern chips. Its tools are installed in practically every leading-edge fab, and its installed base of more than 100,000 process chambers feeds a large, recurring Customer Support Business Group (CSBG) that sells spares, upgrades, services, refurbished and legacy-node tools, and equipment-intelligence software. FY2026 revenue reached a record USD 23.2 billion (+26%), with a 50.5% GAAP gross margin, 35.3% operating margin and USD 7.27 billion of net income. Demand is being driven by AI-related investment in leading-edge logic (gate-all-around transistors, backside power), high-bandwidth and advanced DRAM, NAND layer-count upgrades and advanced packaging — all of which raise etch and deposition intensity per wafer. China exposure (34% of FY2026 revenue) and U.S. export controls remain the principal structural risks. ### What the company does Lam designs, manufactures, markets, refurbishes and services semiconductor processing equipment used to fabricate integrated circuits. Chipmaking repeats a sequence of core steps hundreds of times per wafer; Lam's equipment adds thin films of conducting or insulating material (deposition), removes material selectively to form patterns and high-aspect-ratio structures (etch), cleans wafers and wafer edges between steps (clean), and — newly — forms and develops EUV photoresist in a fully dry, vacuum-based process (dry resist). ### The company's own description (FY2026 Form 10-K) Lam describes itself as a global supplier of innovative wafer fabrication equipment and services to the semiconductor industry, with core competencies in nanoscale manufacturing enablement, chemistry, plasma and fluidics, advanced systems engineering and a broad range of operational disciplines. Its core technical competency is integrating hardware, process, materials, software and process control to deliver results on the wafer. Management attributes its opportunity for sustainable differentiation to five factors: sustained R&D investment across sustaining engineering, product and process development and concept/feasibility work; cycles of learning from its broad installed base; close-to-customer collaboration with ecosystem partners; investment in portfolio breadth aimed at technology inflections; and multi-product solutions that raise the value of Lam's offering. ### Business and revenue model | Revenue stream (FY2026, USD M) | Amount | Share of revenue | What it contains | |---|---|---|---| | Systems revenue | 14885 | 64.1% | New leading-edge deposition, etch, clean and other wafer-fabrication systems | | Customer support-related revenue and other (CSBG) | 8347 | 35.9% | Field service, spares, upgrades, equipment-intelligence services and Reliant new/refurbished non-leading-edge equipment | | Total | 23233 | 100.0% | — | **Systems revenue:** Amount: 14885; Share of revenue: 64.1%; What it contains: New leading-edge deposition, etch, clean and other wafer-fabrication systems **Customer support-related revenue and other (CSBG):** Amount: 8347; Share of revenue: 35.9%; What it contains: Field service, spares, upgrades, equipment-intelligence services and Reliant new/refurbished non-leading-edge equipment **Total:** Amount: 23233; Share of revenue: 100.0% The model is predominantly product-plus-service. Systems are sold per tool, generally recognized at shipment or delivery (Japan shipments are recognized on customer acceptance), and Lam provides a standard warranty. CSBG revenue is recurring and tied to the size and utilization of the installed base; services are recognized over time, usually over contracts of one year or less. There is no material licensing or subscription revenue line, although equipment-intelligence analytics and software are sold within CSBG. List pricing is not publicly disclosed; management has cited pricing actions as a contributor to the 2026 gross-margin expansion. ### Value-chain position Lam sits in the capital-equipment tier of the semiconductor supply chain, upstream of chipmakers (foundries, memory makers and integrated device manufacturers) and downstream of thousands of component, subsystem, gas, materials and contract-manufacturing suppliers. Assembly and testing take place largely in cleanroom environments in the United States, Malaysia, Korea, Taiwan and Austria, supplemented by outsourced manufacturing, warehousing and logistics. ### Customers and end markets | End market (share of systems revenue, %) | FY2024 | FY2025 | FY2026 | |---|---|---|---| | Foundry | 40 | 45 | 54 | | Memory (DRAM + NAND) | 42 | 42 | 39 | | Logic / integrated device manufacturing | 18 | 13 | 7 | Customers are leading memory, foundry and IDM chipmakers. Micron Technology, Samsung Electronics, SK hynix and TSMC were the most significant customers in each of FY2024–FY2026. In FY2026 four customers individually exceeded 10% of revenue (approximately 16%, 15%, 12% and 12%); in FY2025 two did (17% and 15%); in FY2024 one did (17%). **Foundry:** FY2024: 40; FY2025: 45; FY2026: 54 **Memory (DRAM + NAND):** FY2024: 42; FY2025: 42; FY2026: 39 **Logic / integrated device manufacturing:** FY2024: 18; FY2025: 13; FY2026: 7 End-device markets reached through those customers include AI and cloud data centers, smartphones, PCs, automotive, industrial and data storage. Lam also serves wafer-level and panel-level advanced packaging, CMOS image sensors, MEMS, power and other specialty devices. ### Relevance to fab-infrastructure service and software markets Lam is a direct participant in several adjacent fab-infrastructure markets. Its CSBG field-service organization and spares programs constitute one of the largest equipment-maintenance businesses in the industry; Equipment Intelligence® services and fleet analytics address predictive and condition-based maintenance; the Reliant® line supplies refurbished and new non-leading-edge tools; the Semiverse™ Solutions portfolio (built on Coventor's SEMulator3D® virtual-fabrication software) provides process modeling and virtual-fab "digital twin" capabilities; and Lam's global lab network performs process development side by side with customers. ### Independent characterization Lam is best understood as a high-intensity, high-share specialist rather than a broad-line supplier. It does not compete in lithography, and has only small positions in inspection/metrology, ion implant and thermal processing. That narrower scope concentrates exposure on etch and deposition, which are the steps whose intensity rises most as devices go vertical (3D NAND, gate-all-around, stacked DRAM and HBM, hybrid bonding). The large, sticky installed base converts each up-cycle into a decade of service and upgrade revenue, which dampens cyclicality; FY2024's 14.5% revenue decline was absorbed with a 28.6% operating margin. The flip side is concentration: four customers supply more than half of revenue, and China contributed 34% in FY2026.
RTX occupies a structurally advantaged position that no other prime replicates: roughly half its revenue is commercial aerospace and half defence, giving it a natural hedge across two cycles that rarely peak together — and which, unusually, are peaking together in 2026. Collins Aerospace and Pratt & Whitney are entrenched on the installed base of the global narrowbody and widebody fleet, generating decades-long, high-margin aftermarket annuities. The Raytheon segment is the Western world's dominant supplier of ground-based air and missile defence effectors — Patriot, GEM-T, AMRAAM, Standard Missile, ESSM — precisely the munitions category that European rearmament and Middle East conflict have made scarce. A record $289 billion backlog at 30 June 2026, equal to roughly three years of sales, converts that positional advantage into unusual revenue visibility. The offsetting reality is that RTX carries $37 billion of debt, an $85 billion goodwill-and-intangible balance from the merger, and the unresolved cost tail of the GTF powder-metal remediation. RTX Corporation is the world's largest aerospace and defence company by revenue, and the only prime contractor that simultaneously holds franchise positions in commercial aircraft engines, commercial aerospace systems, and ground- and sea-based integrated air and missile defence. It was created in April 2020 by the merger of Raytheon Company with the aerospace businesses of United Technologies Corporation, and it renamed itself from Raytheon Technologies to RTX in July 2023 alongside a consolidation from four operating segments to three. --- ### What the company does RTX designs, manufactures, and services aerospace and defence systems for commercial airlines, aircraft OEMs, business aviation operators, the U.S. Government (principally the Department of Defense, latterly styled the Department of War in contract announcements), and allied governments worldwide. Its FY2025 Form 10-K describes the three segments as follows: Collins Aerospace provides advanced aerospace and defence products; Pratt & Whitney supplies aircraft engines; and Raytheon delivers defensive and offensive threat detection and mitigation capabilities. The company's independent characterisation is better expressed as three distinct economic engines bolted onto one balance sheet: 1. **An installed-base annuity business (Pratt & Whitney and, to a lesser degree, Collins).** Engines and nacelles are sold at or near cost — sometimes at a loss — to win position on an airframe, after which spare parts, overhauls, and long-term service agreements generate profit for twenty to thirty years. This is why Pratt & Whitney's reported segment margin (8.3% in FY2025) looks weak against Collins (16.2%) despite comparable revenue: Pratt is still absorbing original-equipment loss content on the GTF ramp while the aftermarket annuity has yet to reach maturity. 2. **A cost-plus and fixed-price government contracting business (Raytheon, plus Collins' defence lines).** Revenue is recognised over time on the percentage-of-completion basis, which makes reported margins highly sensitive to estimate-at-completion revisions. The FY2024 $575 million charge on a terminated foreign fixed-price development contract is the canonical illustration. 3. **A component and systems supply business (Collins).** Avionics, interiors, power management, and aerostructures sold to Airbus, Boeing, Embraer, Bombardier, and defence primes, with a large parts-and-repair aftermarket layered on top. ### Revenue model and mix | Metric | FY2025 | |---|---| | Commercial share of sales | 48% | | Defence share of sales | 52% | | Products share of sales | ~74% | | Services share of sales | ~26% | | Sales to U.S. Government (excl. FMS) | $33,279m (38% of net sales) | | Total international sales | $41,312m (47% of net sales) | | Total backlog | $268bn ($161bn commercial / $107bn defence) | | Backlog expected to convert within 12 months | ~25% | Sources: FY2025 Form 10-K Item 1 (U.S. government and international sales tables, backlog); RTX 2025 Annual Report sales-mix infographic; Q3 2025 disclosure for the product/service split. Note the structural shift: U.S. Government sales fell from 46% of revenue in FY2023 to 38% in FY2025 — not because U.S. volume declined (it rose from $31.6bn to $33.3bn) but because international and commercial revenue grew far faster. This is the single most important mix fact in the company today, because international direct commercial sales carry materially better margins than U.S. cost-type work, and because European air-defence procurement is the fastest-growing pool RTX addresses. ### Value chain position and customers RTX sits at the prime and Tier-1 layers simultaneously. On F-35 it is a major subsystem supplier (F135 propulsion via Pratt; sensors and avionics via Collins) to prime contractor Lockheed Martin — a direct competitor at the enterprise level. On Patriot and SPY-6 it is the prime. On A320neo it is a propulsion and nacelle supplier to Airbus, which in March 2026 was reported to be formally seeking damages from Pratt & Whitney over GTF disruption. This simultaneous supplier/competitor/counterparty posture across the same customer set is a defining feature of RTX's commercial relationships and a recurring source of litigation and negotiation risk. **End-markets served:** commercial air transport (OE and aftermarket); regional and business aviation; rotorcraft; military fixed-wing and rotary propulsion; integrated air and missile defence; naval combat systems; precision-guided munitions; space sensing and communications; airport and airline IT infrastructure; and government training and mission services.
### Identity and listing | Item | Detail | |---|---| | Entity profiled | Illinois Tool Works Inc. (exact legal-name match; active; publicly listed). The input classification "Public company" is confirmed | | Former names | None of significance disclosed. The company has operated as Illinois Tool Works since founding. Commonly abbreviated "ITW" | | Founded | 1912, Chicago, Illinois. Incorporated 1915 (Form 10-K FY2025) | | Jurisdiction of incorporation | Delaware, USA (Form 10-K FY2025) | | IRS Employer ID | 36-1258310 | | Headquarters | 155 Harlem Avenue, Glenview, Illinois 60025, USA. Tel. (847) 724-7500 | | Exchange / ticker | New York Stock Exchange: ITW (common stock) | | Other listed securities (NYSE) | Euro notes: 0.625% due 2027 (ITW27); 3.250% due 2028 (ITW28); 2.125% due 2030 (ITW30); 1.00% due 2031 (ITW31); 3.375% due 2032 (ITW32); 3.00% due 2034 (ITW34) | | ISIN / CUSIP | US4523081093 / 452308109 | | Fiscal year end | 31 December | | Index membership | S&P 500 constituent. Fortune 300 company (company description, 2026) | ### Scale and organisation | Item | Detail | |---|---| | Employees (latest) | About 43,000 at 31 Dec 2025; about 16,000 in the U.S. (Form 10-K FY2025) | | Employee trend | About 46,000 (FY2022 release); about 45,000 (FY2023); about 44,000 (FY2024 release); about 43,000 (FY2025). This is a steady decline driven by 80/20 simplification and productivity, not by revenue contraction | | Organisation | 88 divisions in 49 countries; about 410 plants and office facilities (Form 10-K FY2025) | | Auditor | Deloitte & Touche LLP. Ratification proposed for FY2026 (2026 Proxy) | | Holders of record | About 3,957 at 31 Jan 2026 | | Website | www.itw.com / investor.itw.com | ### Market data | Item | Detail | |---|---| | Shares outstanding | 288.2 million at 31 Jan 2026 (Form 10-K). About 284 million estimated at 30 Jun 2026, after 4.3 million shares were repurchased in H1 2026 (10-Q Q2 FY2026; derived) | | Market capitalisation (current) | About $82 billion. Basis: share price of roughly $288–$295 (5 Aug 2026 close $295.06; early-September 2026 dividend yield of 2.39% implies about $288) × about 284 million shares | | Market cap at 31 Dec 2025 | About $71 billion (2026 Proxy) | | Market cap discrepancies | Third-party aggregators show $71bn–$85bn depending on date. Live verification is recommended | | 52-week range | $238.82 – $303.16 (as of Aug 2026, aggregator data) | Illinois Tool Works is a 114-year-old, Glenview-based multi-industrial manufacturer with $16.0 billion of FY2025 revenue across seven segments: - Automotive OEM - Food Equipment - Test & Measurement and Electronics - Welding - Polymers & Fluids - Construction Products - Specialty Products ITW does not compete on scale or vertical integration. Its edge is a proprietary operating system, the "ITW Business Model," built on three elements: - **80/20 Front-to-Back management**, which concentrates resources on the largest, most profitable customers and products. - **Customer-Back Innovation (CBI)**, which develops products from customer pain points rather than from a central R&D lab. **A decentralised, entrepreneurial culture:** of 88 scaled-up divisions. Since launching its Enterprise Strategy in late 2012, ITW has lifted operating margin from 15.9% to 26.3% and after-tax ROIC from 14.5% to 29.3%. It has done this while shrinking revenue through divestiture of commoditised businesses (2026 Proxy). The "Next Phase" (2024–2030) pivots the agenda from margin expansion to sustained 4%+ organic growth, powered by a 3%+ CBI revenue yield. ITW is a Dividend King, with 63 consecutive annual dividend increases. --- ### Company's own description (Form 10-K FY2025, paraphrased) ITW describes itself as a global manufacturer of a diversified range of industrial products and equipment, organised into 88 divisions operating in 49 countries. Its seven reportable segments are grouped by similar product offerings and end markets. Products are distributed mainly direct to industrial manufacturers and through independent distributors. Backlog is not considered significant because delivery periods are short and inventory turns quickly. The company names its core competitive advantage as the ITW Business Model: - 80/20 Front-to-Back process - Customer-Back Innovation - Decentralised entrepreneurial culture Primary raw materials are steel, resins and chemicals, sourced from numerous commercial suppliers. ### Business model | Revenue type | Characterisation | Evidence | |---|---|---| | Product sales: consumables | Majority of revenue. Welding filler metals; Polymers & Fluids chemicals; fasteners; Hi-Cone carriers; marking inks; test consumables; contamination-control wipes | Segment product lists (10-K FY2025) | | Product sales: capital equipment | Welding power sources; food equipment; test systems (Instron, MTS); electronic assembly equipment; line automation | Segment product lists (10-K FY2025) | | Services | Food Equipment service, maintenance and repair (service organic growth +2.8% FY2025, +4.8% FY2024); aftermarket service in Test & Measurement | 10-K FY2025 Food Equipment discussion | | Software / subscription | Test & measurement software is embedded with equipment. Not reported separately | Not publicly disclosed | | Licensing | Not material / not disclosed | Not publicly disclosed | ITW's model rests on niche leadership in fragmented, technically demanding markets. Its businesses typically hold strong positions in specialised applications where: - the product is a small share of the customer's total cost but critical to performance (e.g., an automotive fastener, a weld wire, a test frame); and - differentiation comes from engineering, application know-how, brand and service. The 80/20 discipline continually prunes low-value SKUs and customers through Product Line Simplification (PLS). PLS deliberately reduced organic revenue by about 60 basis points in FY2024, about 60 bps in FY2025, and about 60 bps in H1 FY2026, in exchange for structurally higher margins (10-K FY2025; 10-Q Q2 FY2026). **Revenue model mix.** ITW does not report a formal product/service/subscription split. The analyst characterisation is: ### Value-chain position ITW sits as a Tier-1/Tier-2 component supplier (Automotive OEM, Specialty appliance components) and as an OEM of branded equipment and consumables (Welding, Food Equipment, Test & Measurement, Construction Products, Polymers & Fluids). It typically manufactures "in the market, for the market." This localisation was cited in FY2025 as the reason ITW could largely offset U.S. tariff costs through pricing and supply-chain actions (FY2025 release; 10-K FY2025). ### Customer types and end markets | Segment | Primary end markets (10-K FY2025) | Customer type | |---|---|---| | Automotive OEM | Automotive OEMs and tiers | Global and Chinese OEMs; Tier-1 suppliers | | Food Equipment | Food service, food retail, food institutional/restaurant | Restaurant chains, independents, institutions (healthcare, education), supermarkets | | Test & Measurement and Electronics | Electronics/semiconductor, general industrial, auto OEM/tiers, energy, industrial capital goods, consumer durables | R&D labs, quality labs, semiconductor fabs, electronics assemblers | | Welding | General industrial (fabrication, shipbuilding), construction, energy, MRO, capital goods, auto | Fabricators, contractors, OEMs; heavily via distributors | | Polymers & Fluids | Automotive aftermarket, general industrial, MRO | Retail auto-care, body shops, industrial maintenance | | Construction Products | Residential construction, renovation/remodel, commercial construction | Contractors, truss fabricators, big-box retail | | Specialty Products | Food and beverage, consumer durables, airlines, general industrial, capital goods, printing/publishing | Beverage packers, appliance OEMs, airports/airlines, packaging converters | ### Independent characterisation ITW is best understood as a portfolio of about 88 mid-sized, high-return niche franchises bound together by a common management system. Corporate allocates capital. Divisions run the business. Strengths of this structure: - A low-capital-intensity, cash-generative model. Capex was 2.6% of revenue in FY2025 ($419M on $16,044M), and after-tax ROIC is about 29–31%. - Demand is diversified across consumer, industrial and capex cycles. Weaknesses of this structure: - Organic growth has historically been modest (FY2023–FY2025 averaged roughly 0–2%). - PLS creates a built-in headwind to reported growth. - The company has unusually high exposure to Detroit-3 and European auto content, short-cycle construction, and the semiconductor capex cycle. The FY2026 data, with Q2 organic growth of +4.5% and double-digit growth in Welding and Test & Measurement, is the first meaningful evidence that the CBI-driven growth pivot may be gaining traction.
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