Market Size (2025)
$274.00M
Vertical: SEMIBase Year: 2025
Market Size (2025)
$274.00M
Projected (2032)
$2.32B
CAGR (2022–2032)
31.7%
Key Players
12+
Market Overview
The global glass core package substrates market was valued at USD 0.274 Billion in 2025 and is projected to reach USD 2.322 Billion in 2032, growing at a CAGR of 35.8% over 2026–2032. The market is expected to add USD 2.048 Billion in absolute value between 2025 and 2032. Starting from USD 0.148 Billion in 2022, the market grew modestly through 2023 and then accelerated in 2024 and 2025 as pilot production lines for large-package glass cores came into operation and chip designers began to evaluate glass substrates for AI and data-centre products.
Glass core package substrates replace the organic, glass-fibre-reinforced core of a conventional flip-chip package substrate with a panel of glass that carries copper-filled through-glass vias and multilayer wiring on both faces. The glass core offers low and tunable thermal expansion, high flatness and stiffness, low dielectric loss and optical transparency. These properties address the main limitations that organic cores face as packages for AI accelerators, server processors and network switches grow larger, carry more chiplets and memory stacks, and need finer interconnects and better signal integrity.
The market currently combines two types of demand. A mature, steady base comes from smaller glass-based packages used in radio-frequency, sensor and system-in-package modules for smartphones, consumer devices and vehicles. A newer and much faster-growing base comes from large glass cores for AI and high-performance computing, data-centre processors, networking chips and co-packaged optics. The second group accounts for most of the forecast growth, as substrate makers in South Korea, Japan, the United States and China move from qualification lots to commercial production during the second half of the decade.
The growth trajectory is steep but uneven across the period. Year-on-year additions are smaller in 2026 and 2027, when most large-package programmes are still completing reliability evaluation, and become much larger from 2028 onward as qualified designs move into volume and new panel-level capacity comes online.
Key Findings
By glass material type, Borosilicate Glass is the largest segment, valued at USD 0.137 Billion in 2025 with a 50.0% share, reflecting its long use in packaging-related products and its mature processing base. Aluminosilicate & Other Low-CTE Glass is the fastest-growing material type, with a CAGR of 40.6% over 2026–2032, as large AI and server packages require glass whose expansion can be tuned to balance silicon dies and copper-rich build-up layers.
By application, AI & HPC Accelerators and Smartphones & Consumer Electronics are jointly the largest segments in 2025, each valued at USD 0.082 Billion and each holding a 30.0% share. AI & HPC Accelerators is also the fastest-growing application, with a CAGR of 43.4% over 2026–2032, and it reaches USD 1.045 Billion in 2032, becoming the largest application by a wide margin. Co-Packaged Optics & Photonics grows almost as fast, at a CAGR of 43.2%, while Smartphones & Consumer Electronics grows at 21.2%.
By end user, IDMs are the largest segment, valued at USD 0.129 Billion in 2025 with a 47.0% share, because integrated companies have led early glass core development and already use glass in radio-frequency, sensor and automotive packages. Foundries are the fastest-growing end user, with a CAGR of 42.1% over 2026–2032, as foundry-led panel-level and large-package programmes move toward production for fabless AI chip designers.
By region, Asia Pacific is the leading region, valued at USD 0.173 Billion in 2025 with a 63.0% share, supported by its concentration of substrate makers, foundries, OSATs and consumer electronics production. Latin America is the fastest-growing region, with a CAGR of 38.1% over 2026–2032, although from a small base.
By country, the U.S. is the largest individually reported country, valued at USD 0.063 Billion in 2025 and accounting for 23.0% of the global market, while the Rest of Asia Pacific grouping, which includes South Korea and Taiwan, holds 33.1%. India is the fastest-growing country, with a CAGR of 44.0% over 2026–2032.
Segmentation Summary
The segmentation summary brings together the largest and fastest-growing segments across the three segmentations of the market, together with the leading and fastest-growing region and country. A consistent pattern appears across the segmentations: the segments that lead in 2025 are those linked to established glass uses and integrated manufacturers, while the fastest-growing segments are those tied to large AI and data-centre packages and to the foundry-led packaging model. This pattern indicates that the composition of the market will shift considerably over the forecast period, toward engineered low-CTE glass, toward AI accelerators and co-packaged optics, and toward foundries as buyers.
Regionally, the market remains anchored in Asia Pacific, but the highest growth rates are found in smaller regions that are building new data-centre and packaging capability. At the country level, the leading positions of the U.S., China and Japan reflect their roles in chip design, substrate production and packaging, while India's high growth rate reflects new investment in packaging and glass substrate manufacturing supported by its national semiconductor programme.
Regional and Country Highlights
Asia Pacific accounts for 63.0% of the global market in 2025 and is projected to grow from USD 0.173 Billion in 2025 to USD 1.546 Billion in 2032, at a CAGR of 36.9% over 2026–2032. The region hosts the main substrate makers developing glass cores, including Samsung Electro-Mechanics, LG Innotek, Dai Nippon Printing, TOPPAN and BOE, as well as the leading foundries and OSATs. Within the region, the Rest of Asia Pacific grouping, which includes South Korea, Taiwan and Southeast Asia, is the largest country-level entry, valued at USD 0.091 Billion in 2025. China follows at USD 0.045 Billion and grows at a CAGR of 38.5%, supported by display makers entering glass substrate production and by local AI chip demand. Japan, valued at USD 0.029 Billion in 2025, benefits from its glass makers and printing companies with large-panel experience. India, valued at USD 0.008 Billion in 2025, is the fastest-growing country in the market, with a CAGR of 44.0%, reaching USD 0.096 Billion in 2032.
North America holds a 26.0% share in 2025 and grows at a CAGR of 33.4%, from USD 0.071 Billion in 2025 to USD 0.534 Billion in 2032. The U.S. accounts for 88.5% of the regional market in 2025, driven by AI accelerator and data-centre chip designers, the IDM packaging programmes of Intel, and the Absolics glass substrate plant in Covington, Georgia, which is supported by CHIPS incentives finalised in December 2024. Mexico is the fastest-growing country in the region, with a CAGR of 36.5%, supported by electronics and server assembly linked to nearshoring.
Europe holds a 7.0% share in 2025 and grows at a CAGR of 32.9%, reaching USD 0.139 Billion in 2032. Germany is the largest individually reported country in the region, with a 30.0% regional share, supported by specialty glass makers, glass structuring specialists and automotive electronics. Automotive & Industrial Electronics is the largest application in Europe in 2025, which distinguishes the region from the global pattern.
Latin America and Middle East & Africa are small markets, with shares of 1.8% and 2.2% in 2025, but they grow at CAGRs of 38.1% and 37.7% respectively. Brazil is the largest country in Latin America, while in Middle East & Africa the UAE is the largest individually reported country and Saudi Arabia is the fastest-growing, with a CAGR of 40.0%, reflecting large AI data-centre and technology investment programmes announced in 2025.
Competitive Landscape Summary
The market is moderately consolidated and at an early commercial stage. A small group of leaders, comprising Absolics (SKC), Samsung Electro-Mechanics, Intel and Corning, is driving qualification and capacity. Absolics operates a dedicated glass substrate plant in Georgia and received further funding from SKC in May and September 2026 to accelerate commercial production. Samsung Electro-Mechanics runs a pilot line in Sejong and in 2026 formed a joint venture with Sumitomo Chemical's subsidiary Dongwoo Fine-Chem to produce glass cores, targeting production in the second half of 2027. Intel, which announced its glass substrate programme in September 2023, presented a thick glass-core package with EMIB bridges in January 2026. Corning is the leading supplier of precision glass and signed a three-year MOU with BOE in May 2026 that covers glass-based packaging substrates.
Challengers include Dai Nippon Printing and TOPPAN, which brought glass core pilot lines into operation in Japan between late 2025 and mid-2026; LG Innotek, which has a pilot line but reportedly moved its large-scale commercialisation target to around 2030; BOE, which is building glass-based packaging substrate capability in China; and the specialty glass makers AGC and SCHOTT. Niche players include Nippon Electric Glass, with its GC Core glass-ceramic material, and LPKF Laser & Electronics, which supplies laser-induced deep etching systems for through-glass vias and received a letter of intent for production systems from an Asian packaging manufacturer in September 2026.
Competition centres on yield, panel size, reliability data and qualification with a small number of large customers. Bargaining power is high on both the supplier side, because qualified specialty glass and via-forming equipment come from a few sources, and the buyer side, because demand is concentrated among a few AI chip designers, foundries and IDMs. Rivalry among substrate makers is moderate but rising as more capacity approaches commercial readiness.
Challenges and Opportunities
The main challenge for the market is manufacturing yield. Glass is brittle, and micro-cracks can form at via edges and panel edges during drilling, dicing and handling, then grow during thermal processing. Managing large, thin panels through plating, lamination and assembly requires new equipment and process control, and early production runs at several companies have shown high breakage rates. A second challenge is cost and qualification time. Glass cores currently cost more than organic cores, and chip designers require extensive reliability data before committing a product generation, which has led to repeated delays in commercial timelines across the industry. A third challenge is the concentration of supply in a few glass makers, equipment vendors and substrate makers, which raises the risk of bottlenecks as demand grows.
The opportunities are significant. Co-packaged optics offers a natural fit for glass, which can combine electrical vias with optical waveguides and alignment features in a single substrate, and this application is among the fastest-growing in the market. Glass interposers and large chiplet packages provide another path for growth, as foundries and IDMs look for alternatives to silicon interposers for very large packages. Radio-frequency, millimetre-wave and automotive radar modules offer steady demand that benefits from glass's low loss. Regional programmes in the United States, India, Japan, South Korea and China are also creating opportunities for new capacity and for suppliers of glass, equipment and materials.
Future Outlook
The market is expected to move through three phases over the forecast period. During 2026 and 2027, growth will be driven by the completion of customer qualification at leading substrate makers, the commissioning of pilot lines in Japan and South Korea, and the first commercial shipments of large-package glass cores, while established radio-frequency and sensor uses continue to provide a stable base. From 2028 to 2030, adoption is expected to broaden as panel-level packaging capacity expands, foundries integrate glass into their large-package offerings and co-packaged optics deployments increase in data centres. From 2031 to 2032, glass cores are expected to become a standard option for the largest AI and server packages, with growth supported by improved yields, lower costs and a wider supplier base.
The market is projected to grow from USD 0.274 Billion in 2025 to USD 2.322 Billion in 2032. Aluminosilicate & Other Low-CTE Glass, AI & HPC Accelerators, Co-Packaged Optics & Photonics and Foundries will gain share, while Borosilicate Glass, Smartphones & Consumer Electronics and IDMs will remain large but grow more slowly. Asia Pacific will remain the centre of demand, and North America will retain a strong position through chip design, IDM packaging and domestic substrate production.
The pace of growth will depend on how quickly yield and reliability issues are resolved and on the timing of qualification at a small number of large customers. Companies that secure early commercial programmes, build stable large-panel processes and form partnerships across the glass, equipment and packaging chain are expected to be best placed as the market moves from development to volume production.
The Glass Core Package Substrates Market market is projected to grow at a CAGR of 31.7% from 2022 to 2032.
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A glass core package substrate is a semiconductor package substrate in which the central rigid layer, known as the core, is made of glass instead of the glass-fibre-reinforced organic laminate used in conventional flip-chip ball grid array substrates. The substrate sits between one or more semiconductor dies and the printed circuit board. Its function is to fan out the very fine connections on the die to the coarser pitch of the board, to distribute power and ground, to carry high-speed signals between dies in multi-chip packages, and to provide mechanical support and dimensional stability to the package during assembly and throughout its working life.
In a typical construction, a thin glass panel is first structured with through-glass vias, which are small holes that pass through the full thickness of the glass. The vias are usually formed by laser-induced modification of the glass followed by wet chemical etching, by direct laser drilling, or, in the case of glass-ceramic cores, by conventional laser processing. The vias are then metallised, generally by depositing a seed layer and electroplating copper, either filling the via completely or coating its sidewalls. Redistribution layers or build-up dielectric layers with copper wiring are added on both faces of the core to create the routing needed between the dies and the board. The finished substrate is then cut from the panel, and the dies, memory stacks, bridges or interposers are attached by the package assembler. Throughout these steps, the glass must be inspected for cracks, chips and residual stress, because small defects at via edges or panel corners can grow during later thermal steps. Electrical testing of the finished substrate checks continuity and isolation across thousands of connections before the substrate is released for assembly, and reliability testing under thermal cycling, humidity and mechanical shock is used to qualify each new design. These inspection and test requirements are more demanding than for organic substrates, and they form a significant part of the cost and know-how involved in producing glass cores.
Glass offers several properties that matter for advanced packaging. Its coefficient of thermal expansion can be matched closely to silicon or tuned to sit between silicon and copper-rich build-up layers, which reduces warpage when large packages are heated and cooled. Its surface is very flat and smooth, which supports finer line widths and spacing in the redistribution layers. It is dimensionally stable during processing, which improves the alignment of fine features over large panels. It has low dielectric loss, which helps high-speed and high-frequency signals, and it is optically transparent, which makes it suitable for integrating optical waveguides and alignment features. Glass is also more rigid than organic laminates of similar thickness, so it resists bending in very large packages.
The study covers glass cores made from three groups of glass material: Borosilicate Glass, Aluminosilicate & Other Low-CTE Glass, and Fused Silica / Quartz Glass. It includes glass core substrates used in packages for AI and high-performance computing accelerators, data-centre CPUs and networking ASICs, co-packaged optics and photonic modules, smartphones and consumer electronics, and automotive and industrial electronics, whether the substrate is purchased by integrated device manufacturers, foundries or OSATs. Both glass cores intended for full multilayer substrates and glass-based substrates for radio-frequency, sensor and system-in-package modules are included, as are glass-ceramic core materials where they perform the same core function.
The study excludes glass carrier wafers and panels used only as temporary supports during wafer thinning or fan-out processing, because these are removed before the package is completed and do not form part of the finished substrate. It also excludes glass used in display panels, cover glass, optical fibres and passive optical components that are not part of a package substrate, as well as conventional organic, ceramic and silicon interposer substrates. Equipment used to manufacture glass core substrates, such as laser and etching systems, inspection tools and plating lines, is not included in the market value, and neither is the value of the semiconductor dies or other components assembled onto the substrate.
The market value represents revenue from the sale of glass core package substrates and glass-based package substrate cores at the point where they are supplied to the end users identified in this study. Where a substrate maker supplies a completed substrate, the value of the full substrate is counted; where a glass supplier provides a structured glass core to a substrate maker or packaging company, the value is counted once at the stage of supply to the end user to avoid double counting. Internal production by IDMs that make glass cores for their own packages is valued at the equivalent commercial price for comparable products.
Glass core package substrates should be distinguished from glass interposers, although the two share many processes. An interposer is a thin layer that sits between dies and a substrate to provide very fine interconnections, while a core is the central structural element of the substrate itself. In practice, some suppliers use similar glass panels and via processes for both products, and some package designs combine a glass interposer with a glass core. The study covers glass interposers only where they serve as the substrate core within the package. Glass cores also differ from silicon interposers, which provide the finest wiring available today but are limited in size by wafer dimensions and lithography fields and add significant cost when packages grow very large. Compared with organic cores, glass offers better flatness and dimensional stability but is more brittle, needs new handling methods and has a shorter record of field reliability. Compared with ceramic substrates, which are used in some high-frequency and high-reliability modules, glass allows much finer via pitch and larger panel processing. The choice among these options depends on package size, interconnect density, electrical performance, cost and the maturity of the supply chain, and in many designs glass is expected to complement rather than fully replace existing substrate materials.
Glass core substrates are produced in several architectural variants. In a conventional construction, the glass core replaces the organic core of an FC-BGA substrate, and organic build-up layers are laminated on both sides. In embedded designs, cavities are formed in the glass so that bridge dies, passive components or other elements can be placed inside the core, which shortens connections and saves surface area. Non-embedded designs keep the core free of such elements and are generally simpler to manufacture. Cores also vary in thickness, from thin glass suited to compact radio-frequency and sensor modules to thick cores, sometimes built from bonded glass layers, intended for very large AI and server packages that need high stiffness and power delivery through large copper vias.
Most glass core substrates are processed on rectangular panels rather than round wafers, because panels make better use of material for large package bodies and allow more packages to be produced per processing step. Panel formats in the range of 300 to 600 millimetres per side are being adopted by pilot lines, with sizes such as 510 × 515 mm drawn from existing substrate and display manufacturing conventions. Smaller wafer formats remain in use for photonic modules and for some radio-frequency products where the package bodies are small and the throughput benefits of large panels are less important.
The technology has developed over more than a decade. Early research by universities, glass makers and IDMs focused on glass interposers and radio-frequency modules, where low loss and dimensional stability gave clear benefits. Interest in full glass cores grew as AI and high-performance computing packages began to exceed the size limits of organic substrates. Intel's public announcement of its glass substrate programme in September 2023 marked a turning point in industry attention, and since then substrate makers in South Korea, Japan, China and the United States have built pilot lines and, in some cases, dedicated production facilities. The market studied therefore combines a mature, steady base of smaller glass-based packages with a newer, faster-growing set of large-package applications that are moving from qualification to commercial supply.
Scope of the Study
The study analyses the global glass core package substrates market across three segmentations, taken directly from the market data. The first is glass material type, which includes Borosilicate Glass, Aluminosilicate & Other Low-CTE Glass, and Fused Silica / Quartz Glass. The second is application, which includes AI & HPC Accelerators, Data Center CPUs & Networking ASICs, Co-Packaged Optics & Photonics, Smartphones & Consumer Electronics, and Automotive & Industrial Electronics. The third is end user, which includes IDMs, Foundries and OSATs. Each segmentation is analysed at global, regional and country level. Within the glass material type segmentation, Borosilicate Glass covers boron-containing silica glasses with low alkali content; Aluminosilicate & Other Low-CTE Glass covers aluminosilicate, alkaline-earth boro-aluminosilicate and other engineered compositions, including glass-ceramic core materials, whose expansion can be tuned for packaging; and Fused Silica / Quartz Glass covers high-purity silica glasses with very low expansion and very low dielectric loss.
Within the application segmentation, AI & HPC Accelerators covers graphics processors, custom AI accelerators and other high-performance computing devices; Data Center CPUs & Networking ASICs covers server processors, data-processing units and network switch chips; Co-Packaged Optics & Photonics covers optical engines packaged with switch or accelerator silicon, silicon photonics carriers and optical interposers; Smartphones & Consumer Electronics covers radio-frequency front-end, antenna, sensor and system-in-package modules for mobile and consumer devices; and Automotive & Industrial Electronics covers radar, driver assistance, in-vehicle networking, power management, industrial sensing and communications modules. Within the end user segmentation, IDMs are companies that design and manufacture their own chips and package them in-house or through partners; Foundries are contract chip manufacturers that offer advanced packaging services; and OSATs are outsourced assembly and test providers that package chips for third parties.
The regional scope covers five regions and their constituent countries. North America includes the U.S., Canada and Mexico. Europe includes Germany, the U.K., France, Italy, Spain and Rest of Europe. Asia Pacific includes China, India, Japan and Rest of Asia Pacific, the last of which includes South Korea, Taiwan and Southeast Asian economies. Latin America includes Brazil, Argentina and Rest of Latin America. Middle East & Africa includes the UAE, Saudi Arabia, South Africa and Rest of MEA. For each region and country, market values are provided for every segment of each segmentation.
The study covers the period from 2022 to 2032. The years 2022, 2023 and 2024 are historic years, 2025 is the base year, and 2026 to 2032 is the forecast period. Compound annual growth rates are presented for the period 2026–2032. All market values are expressed in USD Billion, shown to three decimal places, and shares and growth rates are expressed as percentages to one decimal place. Shares are calculated for the base year 2025, and absolute growth is calculated as the difference between the 2032 and 2025 values.
In addition to market sizing and forecasting, the study examines the factors influencing the market, including drivers, restraints, opportunities and trends, and provides a value chain analysis, an assessment of the five competitive forces, a review of the regulatory environment by region and an analysis of political, economic, social, technological, environmental and legal factors. It also assesses the competitive environment, including the positioning of leading companies, a comparative dashboard of their capabilities and a record of key developments from 2022 to 2026.
The scope is limited to glass core package substrates as defined in this study. Upstream materials such as raw glass, copper and build-up films, and downstream products such as finished semiconductor packages and electronic systems, are considered only in terms of their effect on the market for glass core substrates and are not included in the market value. Pricing is analysed at the level of finished substrates and structured cores supplied to end users, and changes in average selling prices over the forecast period reflect shifts in panel size, layer count, via density and the mix of applications. Currency effects are removed by converting all values to USD Billion at average annual exchange rates for each historic year, with constant rates applied across the forecast period. Values for historic years are based on reported company activity, shipments of glass-based substrates for established applications and early qualification volumes for large-package programmes, while values for the forecast period reflect announced capacity, qualification schedules and expected adoption by application. The country-level analysis allocates demand according to where substrates are delivered to end users for packaging, which means that countries hosting packaging and assembly activity account for most of the value even where the finished products are sold elsewhere.
Research Objectives
To estimate the size of the global glass core package substrates market for 2022–2025 and forecast it for 2026–2032 in USD Billion, with growth rates for 2026–2032.
To segment the market by glass material type, application and end user, and to identify the largest and fastest-growing segments in each segmentation.
To analyse the market across five regions and their constituent countries, and to identify the regions and countries with the highest demand and the fastest growth.
To assess how the expansion of AI accelerators, data-centre processors and co-packaged optics is changing the requirements for package substrate cores and the role of glass in meeting them.
To evaluate the technical and commercial factors that affect the adoption of glass cores, including through-glass via yield, panel handling, reliability qualification and cost compared with organic substrates.
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View Subscription PlansOverview of the Research Process
The research for this study followed a structured process designed for an emerging, technology-led market in which commercial volumes are still small and much of the activity is concentrated in pilot lines, qualification programmes and capacity announcements. The process combined secondary research, primary research with participants across the supply chain, market size estimation using both top-down and bottom-up methods, and a forecasting framework that links demand for glass core package substrates to the development of the applications they serve.
The work began with a definition of the market and its boundaries, including the distinction between glass cores, glass interposers and temporary glass carriers, and the identification of the segmentations used in the study: glass material type, application, end user and geography. A list of relevant companies was then compiled, covering glass makers, through-glass via processing and equipment specialists, substrate makers, packaging companies, chip designers and research institutes. This list served as the basis for secondary research and for selecting participants for primary interviews.
Secondary research was used to build an initial understanding of the technology, the supply chain, the regulatory environment and the investment activity in each region. Primary research was then used to test and refine this understanding, to fill gaps where public information was limited and to gather views on pricing, yields, qualification timing and adoption by application. The resulting information was combined in a market model that estimates historic and base-year values and projects the market over the forecast period.
The process was iterative. Preliminary estimates were reviewed against new information from interviews and public announcements, and the model was adjusted where evidence pointed to different adoption timing, pricing or regional allocation. Each estimate was checked for consistency across segmentations, so that the totals by glass material type, application, end user and region reconcile with the overall market value for every year. A final review compared the results with the observed pace of pilot line commissioning, capital raising and customer qualification during 2025 and 2026, which are the most reliable indicators of near-term commercial activity in this market.
Because the market is moving from development to commercial supply, particular attention was given to separating announced intentions from confirmed progress. Announcements of capacity, partnerships and target dates were recorded with their dates and then tracked against later reports, which allowed the research team to identify programmes that had slipped and to weight forecasts accordingly.
Secondary Research
Secondary research drew on a wide range of sources relevant to semiconductor packaging, specialty glass and electronics manufacturing. Industry associations were an important starting point. SEMI provided information on packaging and substrate trends, equipment and materials markets and industry events, and its May 2026 report with Global Net Corp. on glass core substrates was reviewed for qualitative insight into adoption timing and technical challenges. Other relevant associations include IPC for printed board and substrate practices, JEDEC for reliability test methods, the Japan Electronics and Information Technology Industries Association, the Korea Semiconductor Industry Association and the Taiwan Semiconductor Industry Association.
Government and regulatory bodies were consulted for policy, incentive and trade information. These include the U.S. Department of Commerce and its CHIPS Program Office, the National Institute of Standards and Technology, the Bureau of Industry and Security, the European Commission and the European Chemicals Agency, Japan's Ministry of Economy, Trade and Industry and the New Energy and Industrial Technology Development Organization, South Korea's Ministry of Trade, Industry and Energy, and India's Ministry of Electronics and Information Technology and India Semiconductor Mission. Their publications provided details on incentive awards, export controls, chemical regulation and national packaging programmes.
Company filings and disclosures were a major source of information on capacity, investment and strategy. Annual reports, investor presentations, earnings call materials, stock exchange filings and press releases from glass makers, substrate producers, equipment suppliers, chip designers and packaging companies were reviewed. These sources provided information on pilot lines, capital raising, joint ventures, customer qualification and product launches, and they were essential for tracking developments in 2025 and 2026.
Trade and technical journals were used to understand technology developments and industry practice. Sources included conference proceedings from packaging and electronic components conferences, technical papers on through-glass via formation, metallisation and reliability, trade publications covering semiconductor manufacturing and substrates, and market intelligence services that report on the semiconductor supply chain in Asia. These sources were particularly useful for following the technical progress of pilot lines and the challenges of micro-cracking, warpage and yield.
Paid databases were used for company financial data, trade statistics, patent information and semiconductor market data. Patent analysis helped identify which companies and research institutes are active in glass core technology and how their focus is changing, while trade data on specialty glass and electronic components helped inform the regional analysis. All secondary information was recorded with its date and source, and more recent information was given priority where sources differed.
Primary Research
Primary research was conducted through in-depth interviews with industry participants on both the supply side and the demand side of the market. The interviews were designed to validate the findings from secondary research, to obtain information that public sources do not cover, and to gather expert opinion on market development, pricing and adoption timing.
On the supply side, respondents included executives, product managers and engineers at specialty glass makers, companies providing through-glass via structuring and metallisation, substrate manufacturers developing glass core lines, and equipment suppliers providing laser, etching, plating and inspection systems. These respondents provided insight into production capacity, process yields, cost structures, panel sizes, material choices and the timing of commercial production. Discussions also covered the main technical bottlenecks and the steps being taken to overcome them.
On the demand side, respondents included packaging engineers and procurement specialists at IDMs, foundries and OSATs, as well as engineers at chip design companies working on AI accelerators, data-centre processors, networking chips, photonic modules, mobile devices and automotive electronics. These respondents provided views on the reasons for considering glass cores, the requirements that substrates must meet, the qualification process, the expected timing of adoption in different product types and the price premium they are willing to accept compared with organic substrates.
Additional interviews were held with researchers at universities and research institutes active in advanced packaging, as well as with industry consultants and analysts who follow the substrate and packaging markets. These interviews provided an independent perspective on technology readiness and on the credibility of company roadmaps.
The objectives of primary research were to verify market definitions and segmentation, to confirm or adjust estimates of market size and segment shares, to understand regional differences in demand and supply, to identify the main drivers, restraints, opportunities and trends, and to assess the competitive position of leading companies. Interview findings were compared with each other and with secondary research, and points of disagreement were explored in follow-up discussions to reach a consistent view. Interview guides were tailored to each respondent group, so that glass makers were asked about composition, panel formats and capacity, while packaging and procurement specialists were asked about qualification criteria, cost tolerance and the timing of design decisions.
Market Size Estimation
Market size was estimated using both top-down and bottom-up approaches, and the results were reconciled through data triangulation.
The top-down approach began with the broader market for advanced package substrates, including FC-BGA and other high-density substrates, and with the markets for glass-based packaging products in radio-frequency, sensor and photonic applications. The share of these markets addressed by glass cores was estimated for each year based on the stage of adoption in each application, the volume of qualified products and the capacity of operating glass core lines. This approach was then applied by application, region and end user using information on the location of packaging activity and the mix of products in each region.
The bottom-up approach estimated the output and revenue of individual suppliers and production lines. For established glass-based products, shipments were estimated from company disclosures, interviews and trade information, and multiplied by average selling prices for each product type. For large-package glass cores, the estimate was based on the capacity and utilisation of pilot and early commercial lines, the volume of samples and qualification lots, and the price per substrate or per unit of panel area. Supplier estimates were then aggregated by glass material type, application, end user and region.
Data triangulation was used to reconcile the two approaches. Where top-down and bottom-up estimates differed, the underlying assumptions were reviewed, and further information was gathered through primary research to resolve the differences. The final estimates were also checked against demand-side indicators, such as the number of AI accelerator and server packages using advanced substrates, and supply-side indicators, such as the panel capacity of glass makers and structuring companies. The segment values were then adjusted to ensure that the totals for each segmentation match the overall market value in every year.
Prices were analysed separately for each application, because a large substrate for an AI accelerator carries a very different value from a small radio-frequency module substrate. Price trends were estimated based on expected improvements in yield, increases in panel size and changes in layer count and via density over the forecast period.
Forecasting Methodology
The forecast was developed by linking demand for glass core package substrates to the expected development of each application and to the expected pace of glass adoption within it. Several factors were considered. For AI & HPC Accelerators and Data Center CPUs & Networking ASICs, the forecast reflects expected growth in data-centre investment, the trend toward larger packages and chiplet-based designs, and the timing of glass core qualification at leading chip designers. For Co-Packaged Optics & Photonics, it reflects the expected timing of co-packaged optics deployment in data-centre switching and the role of glass in optical integration. For Smartphones & Consumer Electronics and Automotive & Industrial Electronics, it reflects device shipments, the content of radio-frequency and sensing modules per device and the adoption of radar and advanced driver assistance systems.
On the supply side, the forecast considered announced capacity, the timing of pilot line conversion to commercial production, expected improvements in yield and cost, and the availability of specialty glass and processing equipment. Company roadmaps were assessed against their track record, and the forecast applies adjustments where past timelines have slipped.
The forecast also took into account macroeconomic and policy factors, including semiconductor incentive programmes, export controls, trade policies and regional investment in data centres and electronics manufacturing. The growth of regional demand was linked to the expansion of packaging and assembly activity in each region.
The approach combined quantitative modelling with expert judgement. Adoption curves were developed for each application based on the typical pattern of new substrate technologies, with slow initial uptake during qualification followed by faster growth once commercial production is established. These curves were calibrated with primary research and reviewed for consistency across regions and segments. Growth rates for 2026–2032 were then derived from the projected values. Sensitivity checks were run on the factors with the greatest influence on the outcome, namely the year in which large-package glass cores reach volume qualification, the rate at which yields improve on large panels and the price premium over organic substrates. These checks were used to test whether the base-case projections remained consistent with the range of views gathered from interviews, and to understand which segments and regions would be most affected if adoption were to arrive earlier or later than expected.
Base Year and Forecast Period
The base year for the study is 2025, which is the most recent full year for which information on company activity, shipments and pricing could be assembled. Historic data are presented for 2022, 2023 and 2024 to show how the market developed during the period when glass core technology moved from research toward pilot production. The forecast period runs from 2026 to 2032, and compound annual growth rates are presented for 2026–2032.
All market values are expressed in USD Billion. Values in other currencies were converted using average annual exchange rates for historic years, and constant exchange rates were applied for the forecast period so that projected growth reflects changes in volume and price rather than currency movements. Market shares are calculated for the base year 2025, and absolute growth is presented as the difference between the 2032 and 2025 values.
Base Year
2025
Historical Period
2022 – 2024
Forecast Period
2026 – 2032
Primary Interviews
150+
Historical data (2022–2025) and forecast period (2025–2032)
Our research process spans primary interviews with industry stakeholders combined with comprehensive secondary data analysis, validated through triangulation across multiple independent sources.
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View Subscription PlansIntroduction
The glass core package substrates market is at an early commercial stage and is moderately consolidated. A small number of companies have built pilot or first commercial production lines for glass cores intended for large, high-performance packages, and these companies account for most of the qualification activity with leading chip designers. Around them sits a wider group of glass makers, substrate producers, display companies and equipment suppliers that provide materials, process technology or early-stage capacity. As of late 2026, no glass core substrate had been publicly confirmed as shipping in a high-volume commercial accelerator or server product, so competitive positions are being shaped by qualification progress, yield and capacity readiness rather than by established revenue.
Competition takes place on several fronts at once. Substrate makers compete on their ability to deliver large, flat, crack-free panels with dense through-glass vias and multilayer build-up at acceptable yield. Glass makers compete on composition control, panel size, flatness and the supply of pre-structured glass. Equipment suppliers compete on via-forming speed, defect control and inspection capability. Across all of these groups, relationships with a few large customers in AI accelerators, data-centre processors and networking chips carry great weight, because a single qualification win can determine the direction of an entire product generation.
Regional strategy also matters. South Korean companies have moved early to build dedicated capacity in both Korea and the United States, Japanese printing and glass companies are using large-panel know-how from displays and photomasks, and Chinese display makers are entering the market with pilot lines and local supply chains. Partnerships between glass suppliers, substrate makers and equipment vendors are common, and capital raising and joint ventures have become important tools for funding the transition to volume production during 2025 and 2026.
Key Player Positioning
The leaders group comprises Absolics (SKC), Samsung Electro-Mechanics, Intel and Corning. Absolics operates a dedicated glass substrate plant in Covington, Georgia, supported by U.S. CHIPS incentives finalised in December 2024, and during 2026 it reported progress in customer reliability evaluations and received further funding from its parent SKC in May and September 2026. Samsung Electro-Mechanics combines a leading position in high-end organic FC-BGA substrates with a glass core pilot line at its Sejong plant and a 2026 joint venture with Sumitomo Chemical's subsidiary Dongwoo Fine-Chem to produce glass cores, which gives it both technical depth and a path to capacity. Intel is the technology pioneer, having announced its glass substrate programme in September 2023 and presented a thick glass-core package with EMIB bridges in January 2026; its position rests on intellectual property, design know-how and its role as a large in-house user. Corning is the leading glass supplier, with broad experience in precision glass for displays and semiconductors and a widening range of partnerships, including a three-year MOU with BOE signed in May 2026 that covers glass-based packaging substrates.
The challengers group includes Dai Nippon Printing, TOPPAN, LG Innotek, BOE, AGC and SCHOTT. DNP and TOPPAN draw on decades of experience in fine patterning and large-panel processing, and both brought glass core pilot lines into operation between late 2025 and mid-2026 in Japan, with DNP targeting mass production in fiscal 2028. LG Innotek has completed product development and runs a pilot line, but reports in January 2026 indicated that it had moved its large-scale commercialisation target to around 2030, which places it behind the leaders in timing. BOE has invested in a glass-based packaging substrate pilot line and has delivered large-format prototypes, supported by its display-scale glass handling expertise. AGC and SCHOTT are established specialty glass producers with packaging-grade glass panels, carriers and structured substrates; they are challengers because they supply materials and semi-finished cores rather than complete substrates, and their success depends on the adoption choices of substrate makers.
The niche players group includes Nippon Electric Glass and LPKF Laser & Electronics. Nippon Electric Glass offers a differentiated glass-ceramic core material, GC Core, introduced in June 2024, which can be drilled with conventional CO2 lasers and targets cost reduction in via formation; its focus on a specific material approach places it in a niche until the material wins broad adoption. LPKF supplies laser-induced deep etching equipment and process know-how for through-glass via formation, and in September 2026 it received a letter of intent from a leading Asian packaging manufacturer for production systems. Its role is specialised but strategically important, because via formation is one of the main yield bottlenecks in glass core production.
Positions within and across these groups remain fluid. The first company to achieve stable high-volume yield with a major AI or networking customer is likely to gain a lasting advantage in qualification and capacity planning, while companies that slip in timing may shift toward material supply, licensing or partnership roles.
Competitor Dashboard
The dashboard rates the twelve companies on four dimensions using a four-level scale of Low, Medium, High and Very High. Product Portfolio reflects the breadth and maturity of glass core and related packaging products; Regional Presence reflects manufacturing and customer reach across regions; Strategic Alliances reflects partnerships, joint ventures and customer collaborations; and Industry Experience reflects the depth of relevant experience in substrates, glass and advanced packaging. The ratings are consistent with the positioning of each company as a leader, challenger or niche player.
The competitive structure of the glass core package substrates market reflects an industry moving from pilot production to its first commercial volumes. Capital intensity is high, process knowledge is scarce, and the number of buyers able to commit to a new substrate technology is small. The five forces are assessed for the period 2026–2032, taking into account that commercial products were still in qualification during 2026 and that competitive behaviour will change as yields mature and second sources are qualified.
Threat of New Entrants: Medium
The barriers to entering glass core substrate manufacturing are substantial. A new entrant needs a cleanroom panel line, laser via formation and wet-etch tools, copper metallisation equipment, build-up lamination capability and inspection systems able to find defects inside transparent material. Absolics' Covington plant, the most advanced dedicated facility, has been supported by a CHIPS incentive of up to USD 75 million finalised in December 2024 and by repeated capital injections from SKC, including the board-approved investment of about KRW 281 billion in September 2026. Beyond capital, the entrant must build yield know-how that has taken incumbents several years, and it must pass customer qualification programmes that can last more than a year.
Several factors nonetheless keep this threat at a medium rather than low level. Display panel makers already handle large, thin glass sheets and operate panel-format cleanrooms, which gives them a shorter route into the business. BOE has built a pilot line for glass-based packaging substrates and, according to 2026 industry reporting, more than ten Chinese companies have entered the glass substrate field, with firms such as WG Tech reporting high-aspect-ratio TGV capability. Government programmes in the United States, Japan, Korea, China and India actively lower the cost of entry through grants, tax credits and subsidised pilot lines; India's August 2025 cabinet approval of a 3D Glass Solutions unit in Odisha is one example. Equipment makers are also packaging their processes as turnkey systems, so a well-funded entrant can buy capability that incumbents had to develop internally. The most likely entrants are therefore not small start-ups but large display, glass or substrate groups with government backing.
The threat also varies by segment of the value chain. Entering as a glass supplier is harder than entering as a substrate fabricator, because few companies possess fusion-draw or precision down-draw capacity and the compositions involved are proprietary. Entry into via processing and metallisation services is somewhat easier, since equipment can be purchased and some display and printed circuit board firms already run large-panel wet processes. Over 2026–2032 the most visible new entrants are likely to be Chinese display and glass groups supported by domestic funds, Japanese firms connected to panel-level packaging consortia, and Indian projects linked to the national semiconductor programme. Their arrival could add capacity after 2028, but each will need several years to reach the yields required by leading AI chip designers.
Bargaining Power of Suppliers: High
Suppliers hold strong bargaining power. The specialty glass used for package cores comes from a handful of producers, chiefly Corning, AGC, SCHOTT and Nippon Electric Glass, each of which offers proprietary compositions and forming processes. Once a substrate maker has qualified its via, plating and build-up processes on a particular glass, changing to another composition requires repeating much of the qualification work, which ties the substrate maker to its glass supplier for the life of a programme. Glass makers are also extending downstream: Nippon Electric Glass offers a glass-ceramic core product, AGC exhibits microvia glass substrates, and Corning has signed a strategic framework with BOE, which gives them leverage as both suppliers and potential competitors.
Equipment supply is similarly concentrated. Laser-induced deep etching and comparable via processes are offered by a small number of firms, and the September 2026 letter of intent that LPKF received for NEXAR LIDE systems from an Asian packaging manufacturer that had already fully qualified the process shows how a qualified tool becomes embedded in a customer's production plan. Inspection and metrology tools for transparent substrates, high-uniformity copper plating systems and build-up films adapted to glass add further single- or dual-source dependencies. Countervailing factors exist, including the entry of Chinese laser equipment makers and the scale of large substrate makers as customers, but over 2026–2032 the combination of few qualified sources and high switching costs keeps supplier power high.
The power of suppliers is also visible in timing. When glass makers or tool vendors allocate scarce development resources, they favour customers with the clearest path to volume, which can delay smaller substrate makers. Glass suppliers set minimum order sizes and composition-specific pricing, and equipment vendors may require prepayment for systems built to order. Because glass compositions and via processes are tightly coupled, a substrate maker cannot easily play suppliers against each other; switching would demand renewed reliability testing by its own customers. Large substrate makers mitigate this through joint development agreements and, in the case of the Samsung Electro-Mechanics joint venture with Dongwoo Fine-Chem, by bringing glass handling expertise into a jointly owned entity.
Bargaining Power of Buyers: High
The buyer side is concentrated. The early volume for glass cores is expected to come from AI accelerators, data centre CPUs, networking ASICs and co-packaged optics, a set of products designed by a small number of companies and assembled by an even smaller number of IDMs, foundries and OSATs. These buyers control the package design, decide whether glass is used at all, and set the reliability criteria that suppliers must meet. Because organic substrates remain available and familiar, a buyer can delay or cancel a glass programme with limited penalty, which gives it leverage in price and allocation negotiations.
Buyers also use multi-sourcing deliberately. Industry reporting during 2026 describes AMD evaluating Absolics material while Samsung Electro-Mechanics sampled glass cores to several large chip designers, and Intel has signalled a willingness to license its glass substrate technology and work with external producers. This allows a designer to compare yield, cost and delivery across suppliers before committing. Large buyers can also provide funding or capacity commitments in return for priority supply, as has occurred in the organic substrate market, which shifts value toward them. Buyer power is moderated only where a supplier has a clear yield or technology lead and where the buyer needs glass to make a specific product feasible; during the early commercial years, those cases are expected to be the exception rather than the rule.
Information also favours buyers. Chip designers see results from several suppliers' samples and can benchmark yields, electrical performance and reliability across them, while each supplier sees only its own data. Buyers decide when to publish or withhold confirmation of a programme, which affects suppliers' ability to raise capital; no glass core customer had been officially confirmed by a supplier as of the third quarter of 2026, even though several were in evaluation. Assemblers such as foundries and OSATs add a second layer of buyer power, because they control the packaging line into which the substrate must fit and can favour suppliers whose panels match their equipment formats. In the early commercial years, suppliers are therefore expected to accept demanding terms on price, reliability and change control in order to secure reference customers.
Threat of Substitutes: High
The main substitute is the organic build-up substrate, which supports nearly all high-performance packages in production during 2026. Organic substrate makers continue to improve core materials, line widths and warpage control, and their capacity, supply chains and reliability records are established. For many applications, especially smartphones, consumer electronics and mid-range processors, an advanced organic substrate is likely to remain the lower-cost and lower-risk choice throughout the forecast period. Silicon interposers used in chip-on-wafer-on-substrate packages, embedded silicon bridges on organic substrates, and panel-level fan-out packages with organic redistribution layers are further alternatives that solve parts of the same interconnect problem.
The threat is strongest where glass offers only incremental benefits and weakest in very large AI packages and optical integration, where glass flatness, stiffness and optical transparency are harder to replicate. Industry timelines also show the substitute's strength: LG Innotek reportedly moved its large-scale commercialisation target for glass substrates from around 2028 to 2030 in January 2026, citing insufficient demand to justify the investment, and SEMI's May 2026 report placed initial production around 2028 in selected high-performance applications. Over 2026–2032 the threat of substitutes therefore stays high, even as glass gains ground in the most demanding packages.
Substitution also works in the opposite direction within packaging technologies. Organic substrate makers such as Ibiden, Unimicron and Shinko have continued to invest in larger, thicker organic cores and finer build-up layers, and some have also entered glass development, which allows them to offer whichever technology a customer prefers. Silicon interposers are mature in high-bandwidth memory integration, and silicon bridge approaches reduce the area of costly silicon while keeping organic cores. For buyers, these options mean that glass must justify its cost and qualification effort with clear performance gains. The degree of substitution threat will decline over time as glass yields improve, but it remains the most important constraint on how quickly glass reaches mainstream products.
Competitive Rivalry: Medium
Rivalry is currently a race on technology and timing rather than on price. Absolics, Samsung Electro-Mechanics, LG Innotek, DNP, TOPPAN and BOE are each trying to be the first qualified high-volume supplier for a flagship package, and each has announced pilot lines or sampling programmes between late 2024 and 2026. Competition shows up as public commitments to schedules, capacity announcements, joint ventures and customer sampling claims. The formation of the Samsung Electro-Mechanics and Dongwoo Fine-Chem glass core joint venture in 2026 and SKC's decision in May 2026 to allocate about KRW 589.6 billion of a capital increase to glass substrates show how rivals are committing resources to secure an early position.
Several features keep rivalry at a medium level for now. The number of credible suppliers is limited, demand in 2026 is still at the sample and qualification stage, and buyers want more than one source, so early movers are not yet competing for the same fixed volume. Regional and customer alignment also separates rivals to some degree: U.S. designers seeking domestic supply look to Georgia and to Intel's planned New Mexico capacity, while Japanese and Korean makers work closely with Asian packaging houses. Rivalry is expected to intensify after 2028 as additional plants reach volume, Chinese entrants scale up and price becomes a larger part of procurement decisions.
The basis of competition is also broader than manufacturing. Rivals compete on access to glass supply, on intellectual property positions in via formation and metallisation, on proximity to major packaging lines and on their ability to finance years of pre-revenue operation. Intel's January 2026 demonstration of a thick glass core with embedded EMIB bridges and its stated openness to licensing add another dimension, since technology owners may compete by enabling others rather than by producing at scale. Japanese suppliers such as DNP and TOPPAN emphasise panel-level processing and existing relationships with Japanese and Taiwanese assemblers, while Korean suppliers lean on their positions in organic flip-chip substrates and their ties to U.S. chip designers. This diversity of strategies limits head-to-head price competition in the near term.
Taken together, the forces describe a market in which value is concentrated at the two ends of the chain, with specialty glass and equipment suppliers on one side and a small group of chip designers and assemblers on the other, while substrate makers carry most of the capital and yield risk in between.
Threat of New Entrants: Medium; High capital and yield-learning barriers, partly offset by display makers' glass handling skills and government-funded pilot lines.
Bargaining Power of Suppliers: High; Few qualified specialty glass and TGV equipment sources; process qualification ties substrate makers to one glass and tool set.
Bargaining Power of Buyers: High; A small group of chip designers and assemblers control package design, set qualification terms and multi-source deliberately.
Threat of Substitutes: High; Advanced organic substrates, silicon interposers and bridges remain established, lower-risk alternatives for most packages through 2032.
Competitive Rivalry: Medium; Rivals compete on qualification timing and capacity commitments; price competition is limited while demand remains at the sampling stage.
Market estimates by geography (2032)
InsightAsia Pacific leads with $1.55B by 2032, while Latin America is projected to grow fastest at a 32.9% CAGR.
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View Subscription Plans| REGION | 2022 | 2025 | 2032 | CAGR | SHARE |
|---|---|---|---|---|---|
| North America | $40.00M | $127.00M | $534.10M | 29.6% | 23% |
| Europe | $11.10M | $33.70M | $139.30M | 28.8% | 6% |
| Asia Pacific | $91.00M | $322.00M | $1.55B | 32.7% | 67% |
| Latin America | $2.70M | $9.20M | $46.40M | 32.9% | 2% |
| Middle East & Africa | $3.30M | $11.20M | $55.70M | 32.7% | 2% |
| Total | $148.10M | $503.10M | $2.32B | 31.7% | 100% |
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View Subscription PlansTotal Market Size
$2.32B
| APPLICATION | REVENUE ($B) | GROWTH RATE | MARKET PENETRATION |
|---|---|---|---|
| Borosilicate Glass | $1.02B | 29.0% | 44% |
| Aluminosilicate & Other Low-CTE Glass | $835.90M | 37.1% | 36% |
| Fused Silica / Quartz Glass | $464.40M | 30.4% | 20% |
* Revenue projections based on 2025 estimates. Growth rates represent CAGR 2024–2030. Market penetration indicates current adoption rate within addressable market segments.
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Analytical insights on Glass Core Package Substrates Market covering market dynamics, competitive landscape, and strategic outlook.
The Glass Core Package Substrates Market market is projected to reach $2.32B by 2032, growing at 31.7% CAGR. The Borosilicate Glass segment holds the largest share.
The glass core package substrates market sits at an early commercial stage, and the forces acting on it differ from those that shape mature substrate categories such as organic build-up substrates based on Ajinomoto Build-up Film (ABF). Demand is not yet determined by replacement cycles or price competition between established suppliers. It is determined by whether glass can solve specific engineering problems that organic cores struggle with in the largest and most power-dense semiconductor packages, and by how quickly the supply chain can turn pilot lines into qualified volume capacity. As of late 2026, several suppliers were shipping samples and running reliability evaluations with customers, while the first volume ramps were scheduled between the end of 2026 and the end of the decade.
The dynamics in this market therefore combine two layers. The first is a set of technical pull factors created by artificial intelligence (AI) accelerators, high-performance computing (HPC) processors, networking switches and optical engines, all of which need flatter, more dimensionally stable and more finely patterned substrates than conventional cores provide. The second is a set of manufacturing and commercial factors that decide how fast that pull converts into revenue: through-glass via (TGV) drilling yield, crack control during handling and dicing, panel-level equipment readiness, qualification timelines at integrated device manufacturers (IDMs), foundries and outsourced semiconductor assembly and test providers (OSATs), and the cost gap with organic alternatives.
The analysis that follows sets out a factor scoring table, then examines three drivers, two restraints, three opportunities and two key trends. Each factor is described in terms of what it is, why it is occurring, how it changes demand or supply, and which glass material types, applications and end users it affects most. The discussion is qualitative and draws on company announcements and industry developments from 2023 to 2026, with emphasis on the most recent events.
Market Growth Factor Analysis
Among the macro factors, capital spending on AI data centres carries the highest scores across all three windows because it funds the accelerator and networking programmes that are the first intended users of glass cores. Industrial policy and the localisation of advanced packaging supply chains score strongly in 2026–2027, when public support is helping to finance pilot and first-volume lines in the United States, South Korea, Japan, China and India, and taper slightly in 2031–2032 as private customer demand takes over as the main source of funding. Data centre power constraints gain weight from 2028, as operators look for packaging approaches that shorten electrical paths and reduce interconnect losses. Export controls on advanced chips are scored as an inhibiting factor because they fragment the customer base and complicate cross-border qualification, although their influence is expected to ease somewhat as regional supply chains settle. Consumer electronics replacement cycles are rated as steady and of modest weight, since smartphones and wearables use glass mainly in smaller, cost-sensitive packages where the case for switching from organic substrates is narrower.
The micro factors show a clearer change over time. Package size growth beyond the tolerance of organic cores is the strongest promoting factor and remains so through 2032, because each new generation of AI and HPC devices integrates more chiplets and high-bandwidth memory stacks on a single substrate. TGV drilling yield and the control of micro-cracking score highest as inhibitors in 2026–2027 and decline in the later windows as laser-induced etching, inspection and handling automation mature. Qualification time follows a similar path: the first programmes take several years to clear reliability testing, while subsequent programmes benefit from accumulated data and design rules. Panel-level capacity build-out rises in importance as pilot lines at substrate makers and display-glass companies move toward volume. The availability of low-CTE glass in large panel formats is rated as steady, because the main glass producers already supply large display substrates and are adapting compositions rather than building an entirely new supply base.
Taken together, the scores indicate a market whose near-term development is shaped as much by manufacturing readiness as by demand, with the balance moving toward demand-side factors from 2028 onward. The promoting factors are concentrated in AI and HPC accelerators, data centre CPUs and networking ASICs, and co-packaged optics, while the inhibiting factors fall most heavily on the suppliers and early adopters that must absorb learning costs before volumes justify full-scale capacity. The steady factors set the boundaries within which the others operate: consumer electronics demand provides a base of smaller-format opportunities, and glass supply is not expected to be the binding constraint on growth during the forecast period.
Larger AI and HPC Packages Exceeding Organic Core Limits
The single most important reason that chipmakers are evaluating glass cores is the physical size of the packages they now need to build. Leading AI accelerators combine one or more large compute dies with several high-bandwidth memory (HBM) stacks, input/output chiplets and, increasingly, silicon bridges, all mounted on a common substrate. Each product generation adds silicon area, so the substrate that carries the assembly has grown from the dimensions of a typical server processor package toward footprints approaching or exceeding 100 mm on a side. Organic cores made of glass-fibre-reinforced epoxy laminates were designed for much smaller packages, and as they are scaled up their limitations become harder to manage. The core expands and contracts with temperature at a rate several times higher than that of silicon, the laminate is relatively soft, and the combination of thick build-up layers on both sides with large mounted dies produces warpage during reflow and thermal cycling. Warpage of this kind causes non-wet solder joints, cracked bumps and coplanarity failures at the board level, and it limits how many dies can be placed on a single substrate before assembly yield falls to unacceptable levels.
Package designers have so far managed the problem with a series of workarounds, including thicker cores, metal stiffener rings, lids bonded to the substrate, asymmetric build-up stacks tuned to counteract bending, and lower-temperature assembly profiles. Each of these measures adds cost, consumes board area or constrains thermal design, and their effectiveness diminishes as packages grow. The rising power consumption of accelerators compounds the issue, since higher operating temperatures and larger temperature swings during workload changes increase the mechanical stress that the substrate must absorb throughout its service life in a data centre rack. Liquid cooling, which has become common in high-density AI deployments, changes the thermal gradients across a package but does not remove the mismatch between the expansion of an organic laminate and that of silicon, so the mechanical problem persists even as cooling improves. For package designers the practical consequence is a ceiling on package size that becomes more restrictive with every additional HBM stack or compute tile, and that ceiling increasingly determines how much compute can be placed in a single module.
Glass addresses this problem through its material properties rather than through added process complexity. Engineered glass compositions can be tuned to a coefficient of thermal expansion (CTE) close to that of silicon, and glass is far stiffer and flatter than an organic laminate of similar thickness. A glass core therefore keeps its shape through the thermal excursions of chip attach, underfill cure and board mounting, which allows larger packages to be assembled with tighter control of bump coplanarity. Because the core itself resists bending, designers can reduce or remove stiffeners, use thinner overall stacks and place dies closer to the package edge, all of which help with thermal management and board layout. Intel made this argument explicit when it announced its glass substrate programme in September 2023, describing glass as the route to packages with more chiplets and higher interconnect density in the second half of the decade.
In January 2026, at NEPCON Japan, Intel showed a thick-core glass package measuring 78 mm by 77 mm that combined a two-layer glass core with ten build-up layers on each side and two embedded silicon bridges, carrying roughly twice the reticle-limited silicon area, and the company reported no micro-cracking in its testing of that vehicle. Demonstrations of this kind matter because they show that glass can carry package sizes at which organic cores require costly stiffeners, thicker cores or design compromises. They also give chip architects confidence to plan product generations around substrate sizes that would be difficult to commit to if organic cores remained the only option, which pulls glass into long-range roadmaps even before volume supply exists. Glass also offers a choice of core thicknesses, from thin single sheets to bonded multilayer cores, which lets designers trade stiffness against via aspect ratio and weight. That flexibility is useful because the optimal core differs between a compact networking package and a very large accelerator module, and a single material family can serve both cases with adjustments to thickness and composition rather than a change of technology.
The demand effect of this driver is concentrated in the applications where package growth is steepest. AI & HPC Accelerators are the most directly affected, since GPU and custom accelerator roadmaps from 2026 onward assume larger interposers, more HBM stacks and, in time, package areas that a glass core can support more reliably than an organic one. Custom accelerators designed by cloud operators add to this pull, because these programmes often push package size aggressively to place as much compute and memory as possible in each module. Data Center CPUs & Networking ASICs follow closely: high-core-count server processors built from multiple chiplets and switch ASICs that integrate large serializer/deserializer arrays face the same warpage limits, although on a slightly later schedule because their packages are generally smaller than those of flagship accelerators. Automotive & Industrial Electronics and Smartphones & Consumer Electronics are much less affected by this particular driver, since their packages are small enough for organic or ceramic substrates to remain adequate. Among glass material types, the driver favours compositions whose expansion behaviour can be matched closely to silicon and to the copper redistribution layers built on them.
This is why Aluminosilicate & Other Low-CTE Glass attracts development attention for the largest packages, while Borosilicate Glass, which offers a mature supply base and a moderate expansion coefficient, remains the reference material for many first-generation cores. Fused Silica / Quartz Glass offers the lowest expansion of the three but is harder to process at panel scale and is used selectively where its thermal stability justifies the additional processing effort and cost. The influence of this driver is therefore clearest at the top end of the product range, where the largest and most valuable devices are designed. As those devices account for a growing portion of total substrate value, the driver lifts demand for glass cores even while unit volumes in the cost-sensitive segments remain modest, which explains why early supplier investment is aimed so squarely at data centre customers.
On the supply side, package size growth changes which suppliers are relevant. Substrate makers that have built their businesses around organic FC-BGA substrates, including Samsung Electro-Mechanics, which began sampling from a glass core pilot line at its Sejong plant in 2024 and moved the programme into a business execution unit in February 2026, now need glass handling, TGV formation and glass-compatible metallisation in addition to their existing build-up processes. This expands the range of capabilities a substrate supplier must hold and raises the importance of partnerships with glass producers and equipment makers. IDMs with internal packaging, foundries offering advanced packaging services and OSATs serving accelerator customers all face the same question of when to qualify glass for their largest products. IDMs tend to be first because they control both the die design and the package, which allows them to co-optimise the core with the chip and to absorb the engineering cost of a new substrate within a single product programme. Foundries follow when their customers' accelerator programmes require it, and their decision is shaped by the need to offer a packaging platform that scales with the chiplet designs they manufacture.
OSATs adopt as glass substrates become available as purchased components that fit existing assembly lines, and their timing depends on whether glass cores can be handled with modest changes to die attach, underfill and ball attach equipment. The driver therefore acts across all three end-user groups, but with different timing for each, and it gives the market a demand base that grows with every increase in accelerator package size rather than with unit shipments alone. Suppliers that can show stable warpage control on the largest panels are likely to secure early design wins, because accelerator programmes typically select substrate suppliers well before product launch and rarely change them during a product generation. This creates a first-mover advantage for the substrate makers whose glass lines reach qualification first, and it explains the urgency with which Korean, Japanese and Chinese suppliers have pursued sampling programmes with leading accelerator designers.
Interconnect Density and Signal Integrity Requirements
A second force behind glass adoption concerns the wiring inside the substrate rather than its mechanical behaviour. Every generation of data centre silicon raises the number of signals that must pass between dies and between the package and the board, and raises the speed at which each signal toggles. Serial links in current switch and accelerator designs run at data rates for which insertion loss, crosstalk and impedance variation in the substrate become the limiting factors in the link budget. Organic cores carry signals vertically through mechanically or laser-drilled plated through holes whose diameter and pitch are constrained by the glass-fibre weave and resin system, and the materials themselves contribute dielectric loss at high frequencies. The fibre weave also introduces local variations in dielectric constant, which cause skew between the two halves of a differential pair when traces run across fibre bundles and resin-rich areas differently. As a result, designers face a trade-off between routing density and electrical performance, and they spend increasing amounts of engineering effort working around the core rather than through it.
Power delivery adds a further constraint: accelerators and switches draw very high currents at low voltages, and the number of vertical connections available for power and ground through an organic core limits how closely voltage regulation can be brought to the die. When the core becomes the bottleneck for both signal and power connections, adding layers to the build-up stack only partly helps, because every signal and power path must still pass through the core to reach the board. These constraints show up in the growing number of build-up layers on high-end organic substrates, which raises cost and lengthens manufacturing cycle times without fully removing the core bottleneck. Substrate makers have also adopted lower-loss build-up dielectrics and finer laser vias in the build-up layers, but in the most demanding designs the core remains the weakest link in the high-speed channel and the main limit on vertical connection density.
Glass changes that trade-off in three ways. First, through-glass vias can be formed at much finer pitch and smaller diameter than through holes in an organic core, which allows many more vertical connections per unit area and frees routing channels in the build-up layers. Laser-induced deep etching, the method used in LPKF Laser & Electronics' LIDE process, modifies the glass with a laser and then opens the via by wet etching, producing straight, smooth-walled holes without the cracking associated with direct ablation. Chinese processors have reported comparable progress: WG Tech stated in 2026 that it had achieved TGV holes of 5 µm minimum diameter with aspect ratios up to 100:1 using an ultrafast laser and etching process. Second, glass surfaces are smooth and flat enough to support finer line-and-space patterning in the redistribution layers than rougher organic surfaces allow, which helps designers fan out dense die-to-die interfaces and reduces the conductor loss that rough copper interfaces introduce at high frequencies. Third, glass has low dielectric loss and stable dielectric properties across temperature and frequency, and because it is a homogeneous material without a fibre weave, it avoids the skew problems that affect differential pairs in organic cores.
The combination of denser vertical connections, finer horizontal wiring and cleaner electrical behaviour allows designers to place more high-speed lanes and more power connections in the same package area. It also opens the possibility of integrating passive components, such as capacitors for power decoupling, closer to the die than is practical with organic cores, which improves power integrity under the rapid load changes typical of AI workloads. Together these properties make the substrate a more active part of the electrical design rather than a passive carrier, which encourages chip and package teams to co-design the die, the redistribution layers and the core from the start of a programme. That shift in design practice is itself a source of demand, since once a product family has been designed around the electrical behaviour of glass, its successors are likely to retain the same substrate approach.
Co-Packaged Optics and Photonic Integration on Glass
Data centre networks are approaching a point at which moving data electrically from a switch chip to a front-panel pluggable optical module consumes a large and growing share of system power. Co-packaged optics (CPO) addresses this by placing optical engines on the same package as the switch or accelerator silicon, so that electrical signals travel only millimetres before being converted to light. This architecture changes what the package substrate must do. In addition to carrying power and high-speed electrical signals, the substrate must hold optical components in precise alignment, provide a stable platform for fibre attachment and, in some designs, guide light itself through waveguides formed in or on the substrate. Organic substrates are poorly suited to these roles because they are opaque, dimensionally unstable over temperature and incompatible with optical waveguide fabrication. Glass, by contrast, is transparent at the wavelengths used in data centre optics, dimensionally stable and compatible with ion-exchange and laser-writing processes that form low-loss waveguides. Optical alignment tolerances are measured in fractions of a micrometre for single-mode fibre coupling, so any drift in substrate dimensions during operation can reduce coupling efficiency and raise link losses.
A glass substrate that holds its shape across operating temperatures preserves alignment over the life of the module, which is a requirement that organic materials meet only with additional mechanical structures. The opportunity therefore rests on properties of glass that are fundamental rather than incremental, giving it a defensible role in optical packaging even if organic substrates continue to improve for purely electrical applications. The problem grows with each increase in switch bandwidth, because faster electrical lanes between switch and module require more equalisation and retiming circuitry, each of which consumes power and generates heat in the front of the server or switch chassis. Moving the optical conversion onto the package removes much of this circuitry, which is why network equipment makers and data centre operators have been evaluating co-packaged designs as a way to keep power per transmitted bit under control as bandwidth rises.
This combination creates a distinct opportunity for glass core substrates that does not depend on displacing organic cores in their existing applications. Suppliers have begun to position products specifically for optical integration. Dai Nippon Printing presented co-packaged optics glass panels with high-density optical waveguides alongside its TGV glass core substrates at SEMICON Japan in December 2025. AGC showed TGV glass substrates for co-packaged optics, together with polymer and glass optical waveguides and optical components, at the same exhibition. In China, WG Tech reported in 2026 that it was delivering glass substrate samples for 1.6T optical modules, and Crystal-Optech was developing TGV optical interconnect substrates for 1.6T and 3.2T co-packaged optics modules in joint validation with customers, with additional optical components scheduled for customer verification in the second half of 2026. Glass makers have also signalled interest in supplying both the substrate and the optical path, which would allow optical features to be formed during glass processing rather than added afterwards. These developments show suppliers treating optics as an application in its own right rather than as a by-product of glass core programmes aimed at accelerators.
Because optical modules and CPO engines are smaller than flagship accelerator packages, they can also be produced on glass with fewer of the warpage and handling difficulties that slow large-format cores, which makes optics one of the more accessible routes to early revenue. The range of participants is notable: glass producers, display manufacturers, printing and photomask companies, and optical component specialists are all pursuing the same application from different starting points. Each brings a different strength, whether in glass composition, large-area patterning, waveguide fabrication or optical assembly, and the partnerships that form between them are likely to determine which suppliers can deliver complete optical-electrical glass substrates rather than individual components. Pluggable module makers are also watching the technology closely, since glass optical substrates developed for 1.6T and 3.2T modules could serve both pluggable and co-packaged formats during a transition period.
The opportunity is concentrated in Co-Packaged Optics & Photonics as an application, but its effects extend to adjacent segments. Data Center CPUs & Networking ASICs are the first host devices for CPO, since Ethernet and InfiniBand switch ASICs face the most severe input/output power constraints, and glass substrates that integrate optical engines with switch silicon are a natural fit. AI & HPC Accelerators follow, as scale-up interconnects between accelerators move toward optical links to support larger clusters that span more than a single rack. Smartphones & Consumer Electronics and Automotive & Industrial Electronics are less directly involved, although lidar, optical sensing and camera modules use related glass processing and could benefit from manufacturing know-how developed for data centre optics. Among material types, Fused Silica / Quartz Glass is well placed because of its very low optical loss, thermal stability and established use in photonic components, while Borosilicate Glass and Aluminosilicate & Other Low-CTE Glass formulations suitable for ion-exchange waveguide fabrication offer a route to larger panel formats at lower cost. This mix suggests that photonic applications could sustain demand for several glass types at once rather than favouring a single composition.
It also means that glass producers with broad composition portfolios, able to supply both optical-grade and substrate-grade materials, are in a stronger position than those focused on one product family. The end-user mix for this opportunity also differs from the wider market. Network switch designers, many of whom work with foundries rather than operating their own fabs, have been early movers in co-packaged optics, so foundries and the OSATs that work alongside them may account for a larger portion of early optical glass demand than they do for glass cores in general. IDMs remain important where they design both the switch or accelerator and the optical engine in-house. Optical module volumes in AI clusters therefore set the pace of this demand.
For end users, the CPO opportunity tends to favour organisations that can integrate silicon photonics, electrical design and packaging. IDMs that design both switch silicon and optical engines can specify a glass substrate that serves both functions. Foundries with silicon photonics platforms and advanced packaging services can offer integrated solutions that include glass interposers or cores, and OSATs with optical assembly capabilities, such as fibre attach and active alignment, can capture assembly value that is higher per unit than conventional electrical packaging. Glass suppliers gain an opportunity to move up the value chain by delivering patterned, via-formed and waveguide-equipped panels rather than bare sheets, which raises the value they capture from each square metre of glass. The main condition for this opportunity to translate into demand is the pace at which data centre operators deploy CPO in production networks, which depends on serviceability, thermal management and the reliability of optical components operating next to hot switch silicon. Glass substrates can help with the thermal and dimensional aspects of these concerns, which strengthens their position as CPO moves from demonstration systems to deployment.
The SEMI and Global Net Corp. report published in May 2026 listed co-packaged optics among the main application areas for glass core substrates, alongside AI, HPC and advanced processors, indicating that industry analysts regard optics as a core part of the demand picture rather than a peripheral niche. Thermal design is a particular concern in this context. Lasers and modulators are sensitive to temperature, and placing them next to a switch chip that dissipates a large amount of heat requires careful management of heat flow through the package. Glass has lower thermal conductivity than silicon, so designers must use thermal vias, heat spreaders or placement strategies to keep optical components within their operating range, and the success of these approaches will influence how widely glass is used in CPO modules.
Glass Interposers for Large Chiplet Packages
Most high-end AI accelerators today place compute dies and HBM stacks on a silicon interposer, a thin slice of silicon carrying very fine wiring, which in turn sits on an organic package substrate. Silicon interposers deliver excellent wiring density, but they are cut from round wafers, are limited in size by lithography and wafer dimensions, and are expensive to produce at the sizes now required. As accelerators grow beyond several times the reticle limit, silicon interposers become both a cost burden and a capacity bottleneck, since they compete for advanced wafer fabrication and packaging capacity that is already tightly allocated. Glass interposers offer an alternative that keeps much of the dimensional stability of silicon while allowing panel-format production, larger sizes and lower material cost. A glass interposer with fine redistribution layers on its surface and dense through-glass vias could connect chiplets and memory directly, or a glass core substrate could take over some of the interposer's role, reducing the number of layers in the package stack. Removing a layer from the stack also removes one set of interconnections and one source of thermal mismatch, which can improve reliability and reduce assembly steps.
Silicon interposers must be stitched together from multiple lithography exposures once they exceed the reticle size, which adds complexity, whereas a glass interposer patterned on a panel can be made in much larger sizes with panel-scale lithography tools, avoiding the stitching problem for all but the finest features. The cost structure of silicon interposers also reflects their production on wafer lines that use mature but still expensive front-end processes, including deep reactive ion etching for through-silicon vias and multiple lithography layers. As interposers grow, the number that fit on a wafer falls and the cost per interposer rises steeply, which is why accelerator designers have been looking for alternatives that scale more gracefully with size. Capacity for silicon interposer packaging has at times been one of the tightest constraints on accelerator shipments, and every additional unit of capacity requires investment in wafer-level equipment that is also needed for other advanced products. A glass alternative that can be produced on separate panel lines would ease that competition for resources.
This opportunity has attracted attention from companies that sit at different points in the value chain. TOPPAN's Ishikawa pilot line, announced in December 2025 with commissioning planned for July 2026, was designed to develop large glass-substrate interposers alongside glass cores and organic redistribution-layer interposers, under a project supported by Japan's New Energy and Industrial Technology Development Organization (NEDO). Rapidus was reported in December 2025 to be preparing an interposer prototype cut from a single large glass substrate, with production targeted for 2028, and in 2026 the company was studying panel-level packaging on 600 mm by 600 mm glass. These activities indicate that glass is being considered not only as a replacement for organic cores but as a substitute for silicon in the layer that directly connects chiplets. The approach also appeals to companies seeking to build advanced packaging capacity without the scale of wafer fabrication infrastructure that silicon interposers require. A glass interposer line can be built with panel-processing equipment, which lowers the entry cost and gives substrate makers and display-derived suppliers a route into a part of the package that has historically been the preserve of foundries.
That broadening of the supplier base could ease the capacity constraints that have periodically limited shipments of high-end accelerators, which gives chip designers a supply-security reason to support glass interposer development in addition to the cost and size arguments. Organic redistribution-layer interposers represent a competing route that is being developed in parallel, and some suppliers, including TOPPAN, are working on both. The coexistence of glass and organic interposer programmes means that customers can compare the two directly, and the outcome is likely to vary by product: organic interposers may be preferred where cost dominates, while glass is favoured where dimensional stability and very large sizes are essential. Each of these programmes was still at a pilot or prototype stage in 2026, with commercial output and full customer qualification still ahead of them.
Yield Loss, Micro-Cracking and Handling Fragility
Glass is stiff, flat and dimensionally stable, but it is also brittle, and that combination creates the most persistent manufacturing restraint in this market. A glass core panel may pass through dozens of process steps, including via formation, seed layer deposition, copper plating, chemical-mechanical planarisation, build-up lamination on both sides, singulation and assembly, and each step introduces mechanical or thermal stress. Small edge chips, subsurface damage from drilling and stress concentrations around copper-filled vias can grow into cracks that propagate across the panel or through a finished unit. Industry participants in South Korea refer to the typical failure mode as SeWaRe, a term for micro-cracks that appear during drilling and dicing, and TrendForce identified it in 2026 as the main obstacle to volume production of glass substrates across the industry. Because a crack in a single large package can scrap a substrate carrying expensive silicon, the economic consequence of a yield problem in glass is far greater than the cost of the glass itself. The difficulty is made worse by the fact that some cracks are latent: they may not be visible after manufacturing and only grow during assembly reflow or later thermal cycling in the field.
A substrate that passes outgoing inspection can therefore still fail after expensive dies and memory stacks have been attached, which makes customers cautious and pushes suppliers to invest in more sensitive inspection methods and longer reliability screens before they can promise consistent quality. The underlying physics explains why the problem is hard to engineer away. An organic laminate deforms slightly under load and can tolerate small defects without failing, whereas the strength of glass is governed by the size and location of the largest surface or edge flaw. Every etching, plating and polishing step can alter the surface condition of the glass, so the practical strength of a panel depends on its full process history rather than on its composition alone, and two panels of identical glass can behave very differently after passing through slightly different process conditions.
The fragility problem is especially pronounced during the transition from pilot to volume manufacturing. Pilot lines can manage glass with careful manual handling, slow process speeds and extensive inspection, but production lines must move large, thin panels through automated tools at high throughput. Reporting in March 2026 described Absolics' early production runs at its Georgia facility as losing large numbers of panels to breakage, a sign that handling, fixturing and process windows were still being refined. Copper and glass also expand at very different rates, so thermal cycles during plating, annealing and lamination create stress at the via sidewall, and glass cores with dense via arrays are particularly susceptible because the stress fields of neighbouring vias interact. Singulation is another weak point, as conventional mechanical dicing can introduce edge damage that becomes a crack initiation site during later reliability testing. Suppliers are addressing these issues through laser-based dicing, edge strengthening, stress-relief designs around vias, protective edge coatings and inline inspection, but each solution adds cost and requires validation before it can be used in qualified products.
The equipment used in organic substrate lines, including conveyors, vacuum chucks and lamination presses, was not designed for brittle panels, so substrate makers often need to modify or replace tools rather than simply adjust settings, which raises the capital required for a glass line and lengthens the time needed to bring it to stable output. Panel size adds a further dimension to the challenge. A thin glass panel of 510 mm by 515 mm bends under its own weight when lifted or supported at its edges, and asymmetric build-up layers applied during lamination can pull the panel out of plane, placing the glass under tension at exactly the moments when it is most exposed to handling contact. Automation designed for this format must grip panels at their edges, support them evenly across their area and avoid point loads, which requires new end-effectors, carriers and inspection stations rather than adaptations of tools developed for flexible organic panels.
The restraint affects suppliers and end users unevenly. Substrate makers bear the direct cost of scrapped panels and longer process development, which delays the point at which glass lines become profitable and makes them cautious about committing capital ahead of firm orders. IDMs and foundries are affected through qualification risk, since a design that relies on a glass core cannot ship until the substrate supplier demonstrates stable yields at the required volume, and a supplier's yield problem can delay an entire product launch. OSATs face an additional concern, because their assembly lines must handle glass substrates during die attach, underfill and ball attach without introducing new damage, which may require changes to carriers, pick-and-place tooling and reflow profiles, and because they may be held responsible for cracks that originated upstream but appeared during assembly. Among applications, AI & HPC Accelerators are the most exposed, since they use the largest and thickest cores with the densest via arrays and carry the most valuable silicon, making any latent crack especially costly. Data Center CPUs & Networking ASICs face a similar but somewhat smaller exposure.
Smartphones & Consumer Electronics face a different form of the restraint: thin glass in mobile packages must survive drop and bending tests in the finished device, which raises the bar for mechanical reliability, while Automotive & Industrial Electronics require resistance to vibration and long-term thermal cycling over vehicle lifetimes that can exceed a decade. Beyond direct scrap costs, the restraint raises the expense of failure analysis, since each crack must be traced to its origin to determine whether it began in glass production, via formation, build-up processing or assembly. This investigation takes time and requires close data sharing between companies that are often reluctant to disclose process details. Until clear responsibility rules and yield-sharing arrangements are established, commercial negotiations between substrate suppliers and their customers are more complex for glass than for organic substrates, which slows the conversion of technical progress into signed supply agreements.
Material choice is one of the main tools for managing this restraint, and it shapes demand across the three glass types. Borosilicate Glass benefits from long experience in drilling, etching and handling in microelectronics and display applications, which gives process engineers a well-characterised starting point and explains its continued role in first-generation products. Aluminosilicate & Other Low-CTE Glass compositions can be chemically or thermally strengthened and tuned for better fracture resistance, but new formulations need fresh process development and reliability data before customers accept them. Fused Silica / Quartz Glass is mechanically hard and thermally stable, yet its high processing temperature and hardness make via formation and singulation more demanding, which limits its use to applications where its properties are essential. Alternative core materials are also being developed partly in response to fragility concerns, including glass-ceramic composites designed to be drilled with conventional lasers without cracking. Process routes matter as much as compositions; laser-induced etching methods that avoid direct ablation reduce subsurface damage, and test vehicles built with carefully controlled via and dicing processes have shown that crack-free results are achievable at large package sizes, even if they have not yet been repeated at production volumes.
Until yields across all of these routes reach levels comparable with organic substrates, however, cracking and fragility will continue to slow the pace at which customers commit volume products to glass cores, and they will keep the cost of glass substrates high during the first years of commercial supply. Core thickness is a further lever. Thicker cores resist bending and handling damage better but make deep vias harder to form and fill, while thinner cores ease via formation but raise breakage risk; suppliers must find a balance for each product class. Chemical strengthening through ion exchange can improve surface strength, but the alkali ions it introduces may conflict with requirements for low ionic contamination in semiconductor packages, so the strengthening approaches used for display and cover glass cannot always be transferred directly to package substrates.
High Cost, Long Qualification Cycles and Timeline Slippage
Beyond the technical difficulty of handling glass, the market is held back by the commercial reality that a new substrate technology must displace an incumbent that is well understood, widely sourced and steadily improving. Organic ABF-based substrates have been refined over two decades, with established design rules, reliability databases, multiple qualified suppliers and amortised capacity. A glass core substrate, by contrast, currently carries higher unit costs because of low volumes, immature yields, specialised equipment and the expense of new materials such as engineered low-CTE glass panels and TGV metallisation chemistries. For a chip designer, choosing glass means accepting higher substrate cost and greater supply risk in return for performance or size benefits that must be large enough to justify the change. Where an organic substrate with a thicker core, stiffener or modified build-up stack can still meet requirements, the economic case for glass remains weak. The incumbent is also not standing still: organic substrate makers continue to introduce lower-loss dielectrics, finer build-up wiring and improved core materials with lower expansion, each of which pushes back the point at which glass becomes necessary.
Large capacity expansions in organic substrates made in the early 2020s mean that suppliers of the incumbent technology have strong incentives to extend its life, and customers can often obtain incremental organic solutions with shorter lead times and lower risk than a move to glass would involve. The cost gap has several sources that compound each other. TGV formation and inspection add process steps that do not exist in organic core production, glass lines run at low utilisation while customers remain in qualification, and the specialised equipment for laser modification, etching, glass-compatible plating and crack inspection is purchased in small numbers at high prices. Although the substrate represents only part of the total cost of an AI accelerator module, procurement teams still compare it closely with organic alternatives, and a glass core must show a clear system-level benefit, such as higher assembly yield or the ability to build a larger package, to win the argument.
Qualification is the second element of this restraint. A package substrate used in data centre products must pass extensive reliability testing, including temperature cycling, highly accelerated stress testing, moisture sensitivity and board-level reliability, before it can be used in a commercial product. For a new material system, the tests must also establish failure mechanisms and acceptable process windows, which takes longer than requalifying an incremental change to an existing organic substrate. Absolics illustrates the timeline: the company produced mass-production samples at its Georgia plant in the first quarter of 2026, and by September 2026 SKC reported that preliminary evaluations of embedding-type samples were complete and that reliability assessments were under way, with preparations for mass production being accelerated. Industry reporting in 2026 named AMD and Amazon Web Services among the companies evaluating Absolics' prototypes, but none of these customers had publicly confirmed adoption. Each additional customer brings its own test plan, so even after one qualification succeeds, others must still run their own programmes.
Qualification is also tied to specific product generations; if a glass substrate misses the design window for one accelerator family, the next opportunity may be a year or more away, which turns small technical delays into long commercial ones. The need to qualify the full supply chain, including glass panels, via-fill materials, build-up films and assembly processes, multiplies the number of parties whose readiness must align before revenue can begin. Customers in the data centre market also typically require a credible second source before committing a high-volume product to a new substrate technology, since a single-supplier arrangement exposes them to the risk of a production disruption. With only a few suppliers anywhere near volume readiness in 2026, this requirement can delay adoption even when the first supplier's product performs well. Long-duration reliability tests, which must run for many weeks before results are available, cannot be accelerated without changing the test conditions, so qualification timelines have a minimum length that engineering effort alone cannot shorten.
Embedding, Non-Embedding and Alternative Core Materials
One of the clearest trends in the glass core package substrates market is the diversification of product architectures and materials as suppliers seek a design that can reach volume production quickly. Early glass core concepts envisioned a single glass layer replacing the organic core, with through-glass vias connecting build-up layers on both sides. As development has progressed, suppliers have divided their efforts between embedding designs, in which components such as silicon bridges, capacitors or other dies are placed in cavities within the glass core, and non-embedding designs, in which the glass serves as a simpler core without embedded elements. Embedding designs offer the greatest performance benefits, since they shorten interconnects and allow high-density bridges to be placed close to the dies they connect, but they also involve the most complex processing: cavities must be formed precisely in brittle glass, components must be placed and fixed without introducing stress, and the build-up layers must connect reliably to both the glass and the embedded parts. Non-embedding designs are easier to manufacture and qualify, which makes them attractive as a first commercial step and as a way to gain production experience while the more ambitious structures mature.
The trend reflects a broader lesson from the first years of glass core development: that a single all-purpose design is less likely to succeed than a family of designs matched to the needs and risk tolerance of different customers. Suppliers that offer more than one architecture can serve early adopters with simpler products while continuing to develop embedding capability for customers whose future products depend on it. The distinction also affects the business model of substrate makers, because embedding designs require closer integration with the customer's chip and bridge suppliers, whereas non-embedding cores can be sold more like conventional substrates against a customer specification. Suppliers therefore weigh not only technical difficulty but also the type of customer relationship each architecture implies.
Absolics illustrates this shift. The company had concentrated on embedding glass substrates, and in 2026 it began work with an unnamed U.S. semiconductor company to supply non-embedding glass substrate prototypes for next-generation communications chips. In May 2026, SKC stated that Absolics had supplied such prototypes to a U.S. telecom chip company and that mass-production preparations could begin within the year if the customer's reliability evaluation was passed. In September 2026, SKC indicated that supplier selection for non-embedding products was scheduled for the second half of 2026, with the aim of reaching a proof-of-concept stage within the year, while embedding samples from the Georgia facility had completed preliminary evaluation and were undergoing reliability assessment. Designs that embed silicon bridges inside a multi-layer thick glass core show the other end of the spectrum, where glass and silicon elements are combined to reach the highest interconnect density. Dai Nippon Printing's plan to offer both filled vias, with copper filling the entire hole, and conformal vias, with metal coating only the sidewall, reflects similar diversification at the via level.
Filled vias provide better current-carrying capacity and a flat surface for subsequent layers, while conformal vias reduce copper volume and therefore the thermal stress that copper expansion places on the surrounding glass. Offering both lets customers choose according to their electrical and reliability priorities, and it signals that suppliers expect the market to support several product variants rather than converge immediately on one standard structure. The movement of a leading supplier from a single architecture to a dual-track approach is significant because it shows how commercial pressure to generate revenue influences technology choices. A non-embedding product that reaches qualification sooner can fund continued work on embedding designs and give the supplier production data that improves yields across both product lines. Samsung Electro-Mechanics' decision to place glass core production in a joint venture focused on the glass core itself points in a similar direction, separating the glass component from the full substrate and allowing each to be optimised and supplied on its own terms.
Material diversification is following the same pattern. Nippon Electric Glass' GC Core, introduced in June 2024, uses a composite of glass powder and ceramic powder, and the company stated that it could be drilled with a CO2 laser without cracking and tuned for low dielectric loss, higher expansion or higher strength by adjusting the glass-to-ceramic ratio; by 2026 the company had shown GC Core panels at 515 mm by 510 mm and 1 mm thickness. The ability to use widely available CO2 lasers, rather than the specialised laser-modification and etching sequences required for conventional glass, could lower equipment costs for substrate makers and broaden the range of companies able to process glass-based cores. Hybrid structures that combine thin glass layers with organic build-up or with conventional core materials are also under study, as are multilayer glass cores built by bonding thinner sheets, which ease via formation in each layer while giving the finished core the thickness needed for stiffness.
Within conventional glass, producers are refining Borosilicate Glass compositions for better drilling and etching behaviour, developing Aluminosilicate & Other Low-CTE Glass formulations that more closely match the combined expansion of silicon and copper, and offering Fused Silica / Quartz Glass for applications that need the lowest loss and expansion. These developments widen the choice available to package designers, but they also fragment development effort and qualification data across more material systems, which means that each option progresses more slowly than it would if the industry concentrated on a single material. Glass producers and their customers also continue to evaluate the trade-off between composition and process. A glass that is easier to drill and etch may be harder to match to silicon expansion, while a glass optimised for expansion matching may require slower or more expensive via formation. Because these trade-offs differ by application, the market is likely to sustain several material families through the forecast period, with the balance between them determined by which architectures reach volume first and in which applications.
This trend affects demand in several ways. For AI & HPC Accelerators and Data Center CPUs & Networking ASICs, embedding designs promise the largest gains but on longer timelines, while non-embedding designs could reach production sooner in networking and communications devices, where package sizes are smaller and the benefits of glass flatness and via density can be captured without embedded bridges. Co-Packaged Optics & Photonics may favour specific compositions and via types that suit optical integration, and Automotive & Industrial Electronics and Smartphones & Consumer Electronics may adopt glass-ceramic or thinner glass variants where cost and mechanical durability under shock and vibration matter more than maximum density. For IDMs, foundries and OSATs, the range of architectures means that glass adoption will not follow a single path; each customer can choose a combination of glass type, via structure and embedding level that suits its product and its tolerance for risk. IDMs with strong internal packaging teams are more likely to pursue embedding designs, since they can co-design bridges and cores, while OSATs and their fabless customers may begin with non-embedding cores that fit existing assembly flows.
For suppliers, the trend increases development costs but also creates more entry points, since a company does not need to master every architecture to serve part of the market, and glass producers can position specific compositions for specific architectures rather than competing on a single specification. Foundries occupy a middle position, since they may offer both architectures to different customers and must decide which to support within their own advanced packaging platforms. Their choices will carry weight, because foundry platforms define the options available to the many fabless companies that do not have in-house packaging expertise, and a foundry endorsement of a particular glass architecture could accelerate its adoption across a wide customer base. Customer choices will be visible first in networking products.
Consortia, Standardisation and Licensing Models
A second trend concerns the way companies organise development rather than the technology itself. Glass core substrates require coordinated progress across glass production, via formation, metallisation, build-up materials, inspection, assembly and reliability testing, and no single company controls all of these steps. As a result, suppliers and users have increasingly formed partnerships, consortia and licensing arrangements to share development costs, align specifications and shorten time to market. This contrasts with the early phase of the market, around 2023, when much of the visible development took place inside individual companies' research programmes and was announced as proprietary capability. The change reflects the experience of the intervening years: as companies encountered problems with cracking, via filling, inspection and assembly, it became clear that solutions often lay at the interface between two or more participants, such as between the glass maker and the via former, or between the substrate supplier and the OSAT. Collaboration allows these interface problems to be addressed jointly, with each participant contributing data and process knowledge that the others lack.
It also spreads the financial risk of a technology whose commercial timing remains uncertain, which is attractive to companies that want to keep a position in glass without committing the full cost of independent development. Universities and research institutes add a further layer to this collaborative structure, providing test vehicles, characterisation facilities and independent reliability data that individual companies would find costly to replicate. Their involvement helps establish shared understanding of failure mechanisms in glass substrates, which supports both product development and the emergence of common test methods. For customers, this structure means that supplier evaluations increasingly examine the partners behind a glass substrate offer, including the glass source, via-forming equipment and inspection capability, rather than the substrate maker in isolation. This has become the normal way of working in the segment.
Several forms of collaboration are now visible. Equipment and process partnerships, such as the work announced by LPKF Laser & Electronics and Onto Innovation in April 2025 within Onto's Packaging Applications Center of Excellence, combine via formation with inspection and metrology so that customers can evaluate an integrated process flow rather than separate tools. Joint ventures bring together companies with complementary skills: the venture between Samsung Electro-Mechanics and Dongwoo Fine-Chem, agreed in 2026 after a memorandum of understanding with Sumitomo Chemical Group in November 2025, combines substrate design and mass-production experience with large-area glass handling and process cleanliness expertise. Cross-industry agreements are also emerging, as shown by the three-year memorandum between BOE and Corning signed in May 2026, which links a display manufacturer with a glass producer, and by the research partnership that LG Innotek formed around the start of 2026 with UTI, a precision glass processing specialist. In Japan, the Resonac-led JOINT3 consortium, launched in September 2025 to develop panel-level organic interposer technology on 510 mm by 515 mm panels, shows the same collaborative approach applied to a competing interposer route, and its participants are positioned to compare organic and glass options on a common panel format.
Taken together, these arrangements indicate that the competitive unit in this market is increasingly a group of aligned partners rather than a single company, and that customers evaluate the strength of a supplier's partnerships as well as its own capabilities. Collaboration is also becoming more visible between equipment makers and substrate producers in China, where laser equipment suppliers have reported shipping panel-level TGV tools to domestic and overseas packaging customers in 2026. These relationships help equipment designs mature in line with production needs, and they show that the collaborative model is spreading across regions rather than being confined to a few large partnerships in Korea, Japan and the United States.
The value chain for glass core package substrates runs from specialty glass melting through precision via formation, metallisation and build-up lamination, and ends inside the advanced packages assembled by device makers, foundries and outsourced assembly and test providers. Unlike the organic substrate chain, which grew around woven glass-fibre laminates and Ajinomoto Build-up Film, this chain draws on suppliers from three industries that had little contact before 2023: display and technical glass makers, laser and wet-etch equipment builders, and incumbent substrate fabricators. The way value is created and captured at each stage, and the dependencies between stages, explain why commercial supply has taken longer to arrive than the first announcements suggested.
Raw Materials and Inputs
The primary input is a thin, flat sheet of engineered glass, typically supplied as a panel in the 510 mm × 515 mm class or as a round wafer for smaller programmes. Three material families are used: borosilicate glasses, aluminosilicate and other low-coefficient-of-thermal-expansion compositions, and fused silica or quartz. Each must arrive with tightly controlled thickness, total thickness variation, surface roughness and thermal expansion, because these properties determine how well the finished core will match the silicon dies and copper layers that are built on it. The glass is not a commodity in this application; a composition is usually tuned for a specific substrate maker's via process and later fixed during customer qualification, which makes switching costly once a programme is approved.
Supply of these glasses is concentrated in a small group of producers with fusion-draw, float or down-draw capability and long experience in display and semiconductor carrier glass. Corning, AGC, SCHOTT and Nippon Electric Glass are the principal sources. Their recent activity shows how the input stage is moving closer to the substrate itself. Nippon Electric Glass introduced its GC Core glass-ceramic core substrate in June 2024, a composite of glass and ceramic powders that can be drilled with a CO2 laser without cracking. SCHOTT presented glass carrier wafers and glass panels with reduced thickness variation and tailorable thermal expansion at SEMICON Taiwan in September 2025. AGC exhibited glass substrates with microvias for glass core use and TGV glass substrates for co-packaged optics at SEMICON Japan in December 2025. In May 2026, Corning signed a three-year memorandum of understanding with BOE that includes glass-based packaging substrates.
Secondary inputs are equally specialised. Copper plating chemistries, seed-layer sputtering targets and adhesion promoters are needed to fill or line the through-glass vias. Wet etchants, chiefly hydrofluoric acid formulations, are used to open laser-modified via sites. Build-up dielectric films and photo-imageable dielectrics form the redistribution layers on both faces of the core, and solder resists, surface finishes and underfill materials complete the package interface. Many of these chemicals are supplied by the same Japanese, Korean and U.S. firms that serve organic substrates, but they must be re-formulated for adhesion to a smooth glass surface, which offers no mechanical anchoring. This adhesion challenge is one of the reasons input qualification adds months to every new programme.
The geography of input supply creates its own dependencies. Specialty glass melting for this application is concentrated in Japan, the United States, Germany and South Korea, while copper plating chemicals and build-up films come largely from Japanese suppliers. A substrate plant in Georgia or Pyeongtaek therefore relies on imported glass and films that travel long distances before processing, and any disruption to a single furnace or film line can halt a qualified programme. To manage this risk, substrate makers have begun to request second glass sources and regional inventory buffers, and glass makers have responded by offering panel finishing and cutting services closer to their customers. Input costs for glass are modest relative to finished substrate value, but their quality consistency drives downstream yield, which is why glass makers can command premium terms for certified compositions.
Glass Core Manufacturing and Processing
The manufacturing stage converts bare glass into an interconnect platform and is where the largest share of value is added. The first step is via formation. Most programmes use laser-induced modification followed by wet etching, a route in which an ultrashort-pulse laser alters the glass structure along each via path and a chemical bath then removes the modified material to leave smooth, crack-free holes. LPKF Laser & Electronics supplies this process under the LIDE name; in April 2025 it joined Onto Innovation to install Firefly inspection and metrology equipment at its Vitrion glass-processing centre in Hannover, aiming to support high-volume glass substrate manufacturing with higher yields. In September 2026, LPKF received a letter of intent from a leading Asian advanced packaging manufacturer for NEXAR LIDE systems to equip that customer's first glass substrate production facility. Chinese equipment makers have also entered this step; DR Laser reports that its panel-level TGV drilling systems had moved into mass shipments with export orders in early 2026.
Via formation is followed by metallisation, in which copper is deposited either as a fully filled via or as a conformal layer along the via wall. Dai Nippon Printing offers both filled and conformal variants on 510 mm × 515 mm panels and began phased operation of a TGV glass core pilot line at its Kuki plant in Saitama in December 2025, with sample shipments in early 2026 and mass production targeted for fiscal 2028. After metallisation, redistribution layers are built up on both sides of the core through repeated lamination, via drilling, plating and patterning, producing a multi-layer structure that routes signals and power from the motherboard to the dies. Intel's thick-core demonstration in January 2026 used ten build-up layers on each side of a glass core with two embedded EMIB bridges, which illustrates the layer counts that high-end packages require.
The final steps are singulation, inspection and electrical testing. Dicing and edge handling are critical because micro-cracks initiated at panel or unit edges can propagate during later thermal cycles; Korean industry reporting in 2026 identifies cracking during drilling and dicing as the main yield limiter for the whole industry. Inspection tools that can detect sub-surface defects in transparent material are therefore an important source of value and a frequent bottleneck.
The participants at this stage include Absolics, the SKC subsidiary building a glass substrate plant in Covington, Georgia, which completed electrical performance verification and moved into yield stabilisation in 2026; Samsung Electro-Mechanics, which has run a pilot line at its Sejong plant and agreed in 2026 to form a glass core joint venture with Sumitomo Chemical's subsidiary Dongwoo Fine-Chem at Pyeongtaek; LG Innotek, with a pilot line at Gumi; DNP and TOPPAN in Japan; and BOE in China. TOPPAN announced in December 2025 a NEDO-backed pilot line at its Ishikawa plant covering glass cores, glass interposers and organic RDL interposers, with commissioning targeted for July 2026. The value added here is the yield know-how that converts a fragile sheet into a reliable multi-layer core, and it is the stage where most capital has been committed since 2024.
Value capture at this stage depends directly on yield. A panel that cracks late in the build-up sequence destroys all the processing invested in it, so the cost of an unfinished defect rises with each layer. Industry reporting in March 2026 described early production runs at a leading U.S. plant losing large numbers of panels before process changes improved handling. Substrate makers that can raise yields quickly gain both a cost advantage and credibility with buyers, while those that cannot will find it hard to recover their capital. For this reason, much of the manufacturing know-how is protected as trade secrets rather than patents, and process engineers with glass experience have become a contested resource among Korean, Japanese, Chinese and U.S. producers.
Distribution and Channels
Distribution in this market is almost entirely direct. Glass core substrates are custom components designed around a specific package, so they are sold under engineering agreements between the substrate maker and the party that assembles the package, with the chip designer usually involved from the earliest design stage. There is no meaningful role for catalogue distributors or open spot markets. A typical programme passes through sampling, package-level reliability evaluation, product qualification and then volume supply under a multi-year agreement, and each step can take several quarters. Absolics' embedded glass samples were in package-level reliability evaluation in Taiwan in mid-2026, and the company reported in May 2026 that it had supplied non-embedding prototypes to a U.S. communications chip company, a sign of how long the sampling channel runs before revenue appears.
Logistics add their own requirements. Panels and singulated cores must be shipped in clean, edge-protected carriers to avoid chipping, and many programmes prefer the substrate plant to sit close to the assembly site to limit handling. This has encouraged a regional pattern in which Korean and Japanese substrate makers supply packaging lines in Taiwan, Korea and Japan, while U.S. capacity in Georgia and planned capacity in New Mexico serve North American designers seeking domestic supply. Joint development agreements also act as a channel: equipment makers, glass suppliers and substrate makers often co-develop processes with a named customer, and the resulting process recipe effectively binds the supply relationship. The value captured at this stage lies in technical service and qualification support rather than in markup on physical movement of goods.
Commercial terms reflect this engineering-led channel. Prices are negotiated per programme and usually tied to yield and volume commitments, with early lots priced to recover development costs and later lots stepped down as yields improve. Buyers commonly require change-notification clauses that prevent a supplier from altering glass composition, via process or plating chemistry without re-qualification, and they may ask for capacity reservation in return for volume forecasts. Substrate makers in turn sign long-term supply arrangements with glass makers and equipment vendors to secure their own inputs. These layered contracts give the market a stable, relationship-based character once a programme is in production, but they also mean that an entrant without a qualified customer has no open market in which to sell output.
End Users
The end users are the three groups that build finished packages. Integrated device manufacturers design and assemble their own processors and are the most direct adopters; Intel has developed glass substrates for more than a decade and runs a pilot line in Chandler, Arizona. Foundries offering advanced packaging services, led by TSMC, are evaluating glass for panel-level formats; TSMC's CoPoS pilot line in Chiayi was completed around June 2026 using 310 mm × 310 mm panels, with glass integration still under review. Outsourced semiconductor assembly and test providers such as Amkor and ASE assemble packages for fabless designers and are the natural route for glass cores into networking, optical and consumer devices; Amkor, Intel's packaging partner, said in April 2026 that glass core commercialisation was within three years.
Behind these assemblers sit the companies that specify the package and therefore choose the substrate technology: AI accelerator and CPU designers, network switch and optical engine developers, smartphone and consumer electronics brands, and automotive and industrial electronics suppliers. Industry reporting in 2026 indicates that AMD and Amazon Web Services have evaluated Absolics samples and that Samsung Electro-Mechanics has sampled to large U.S. chip designers, although no customer had been officially confirmed by any supplier as of the third quarter of 2026. These buyers capture the system-level value of glass, which comes from larger package areas, finer wiring and better dimensional stability. Their dependency on the upstream chain is high: a single qualified glass core source for a flagship accelerator creates a supply risk that most designers will try to remove by qualifying a second source, which in turn shapes how substrate makers plan their capacity.
The needs of end users differ by application. AI accelerator and data centre CPU programmes value the ability to build very large, flat packages with high wiring density and are willing to pay a premium for it. Network switch and co-packaged optics developers value glass for its optical transparency and low signal loss, which allow waveguides and optical interfaces to be integrated in the substrate. Smartphone and consumer electronics makers are more sensitive to cost and thickness and are likely to adopt glass in smaller form factors, such as thin cores and interposers for radio-frequency and sensor modules. Automotive and industrial customers place reliability and long product life ahead of performance, so they generally adopt new substrate materials only after a long field record in other sectors. These differences shape which substrate maker each end user selects and how quickly glass moves through the product range.
No regulation addresses glass core package substrates specifically. The market is instead shaped by semiconductor industrial policy, export control regimes, chemical and product-content rules, and reliability standards that apply to package substrates in general. The following summary covers the main instruments by region and their status as of late 2026.
North America
The CHIPS and Science Act, signed in August 2022, remains the principal U.S. instrument. Under its incentives programme, the Department of Commerce finalised in December 2024 an award of up to USD 75 million to Absolics for its 120,000-square-foot substrate facility in Covington, Georgia, which is intended to produce glass substrates. The Act also funds the National Advanced Packaging Manufacturing Program, which in November 2024 selected Absolics, Applied Materials and Arizona State University for negotiations on substrate and substrate materials research projects of up to USD 100 million each. These programmes continue to be administered by the Department of Commerce in 2026, although the administration has revisited the terms of several CHIPS awards since 2025, so recipients face some uncertainty about milestone requirements.
Export controls are the second pillar. The Bureau of Industry and Security issued controls on advanced computing items and semiconductor manufacturing equipment in October 2022, expanded them in October 2023 and added further controls on high-bandwidth memory and equipment in December 2024. The AI Diffusion Rule published in January 2025 was rescinded in May 2025, but the earlier controls remain in force. Although glass cores are not listed items, the rules limit which customers can receive the AI accelerators that are expected to use them, and they restrict the transfer of certain packaging and process technologies to China. Canada and Mexico operate within the United States–Mexico–Canada Agreement, whose rules of origin and joint review process influence where packaging and assembly investments are located; Mexico also applies its IMMEX programme to electronics manufacturing for export.
Industrial policy at state level reinforces the federal framework. Georgia, Arizona and New Mexico, which host Absolics' Covington plant, Intel's Chandler pilot line and Intel's planned Rio Rancho volume site, offer tax abatements, workforce training and infrastructure support for semiconductor manufacturing. In Mexico, the Plan México strategy announced in January 2025 identifies semiconductors and electronics among priority sectors for investment incentives. For glass core suppliers, the combined effect of these measures is to favour North American production for U.S. designers, although the programmes do not set any technical requirement specific to glass substrates.
Europe
The European Chips Act entered into force in September 2023 and established a framework for state aid to first-of-a-kind facilities, a Chips for Europe Initiative with pilot lines and a supply crisis monitoring mechanism. Advanced packaging is within its scope, and pilot lines funded under the initiative give European research organisations a route into glass substrate work. The Commission began a review of the Act in 2025, and discussions on a successor framework continue in 2026.
Chemical and product rules matter more directly in Europe than elsewhere. REACH, Regulation (EC) No 1907/2006, governs the substances used in glass processing, plating and build-up materials, and the RoHS Directive 2011/65/EU, extended by Delegated Directive (EU) 2015/863, restricts lead, certain flame retardants and phthalates in electrical and electronic equipment, which affects solder, surface finish and dielectric choices in packages sold in the European Union. The proposal to restrict per- and polyfluoroalkyl substances, submitted by five national authorities and published by the European Chemicals Agency in February 2023, would affect fluorinated process chemicals and some dielectric materials; ECHA published an updated proposal in August 2025, and its scientific committees continue to evaluate it in 2026. Hydrofluoric acid used in via etching is also subject to occupational exposure and industrial emissions rules in member states.
Two further instruments affect the market. The revised Industrial Emissions Directive, adopted in 2024 as Directive (EU) 2024/1785, tightens permitting and emission requirements for large industrial installations, including glass manufacturing, and is being transposed by member states during 2026. The EU Dual-Use Regulation, Regulation (EU) 2021/821, governs exports of sensitive semiconductor technology, and several member states, including the Netherlands since 2023, have added national controls on advanced manufacturing equipment. European glass and equipment suppliers such as SCHOTT and LPKF must therefore manage both chemical compliance at home and export licensing for customers in Asia.
Asia Pacific
Japan's Economic Security Promotion Act, enacted in May 2022, designates semiconductors as specified critical materials and underpins subsidies for domestic production and supply chain resilience. The government announced in November 2024 a framework of public support for AI and semiconductors running to 2030, and NEDO funds packaging research projects; TOPPAN's Ishikawa pilot line for glass cores and interposers, announced in December 2025, is NEDO-backed. South Korea supports the industry mainly through tax incentives under the Restriction of Special Taxation Act, commonly called the K-Chips Act, which raised investment tax credits for national strategic technologies in March 2023 and raised them again in February 2025; these credits apply to substrate and packaging investments by Korean groups such as SKC, Samsung Electro-Mechanics and LG Innotek.
Taiwan's Article 10-2 of the Statute for Industrial Innovation, in effect since 2023, grants tax credits for qualifying research and advanced process investment by companies with a leading role in global supply chains. China launched the third phase of its National Integrated Circuit Industry Investment Fund in May 2024 with registered capital of RMB 344 billion, and the fund supports equipment, materials and packaging projects relevant to the TGV and glass substrate activity of firms such as BOE. In India, in August 2025 the Union Cabinet approved four projects, including a 3D Glass Solutions unit in Odisha designed to make glass panel substrates, glass interposers and heterogeneous integration modules.
India's support is notable for its breadth. The India Semiconductor Mission was launched in December 2021 with an incentive programme of INR 76,000 crore covering fabrication, display, compound semiconductor and assembly projects, and the Modified Scheme for Semiconductor ATMP and OSAT units provides fiscal support for packaging plants. The approval of the 3D Glass Solutions project indicates that glass substrates now fall within the categories eligible for this support, and state-level incentives from Odisha add land and infrastructure benefits. Project execution remains at an early stage in 2026, so the programme's main effect so far is on investment intentions rather than output.
Export control measures in Asia also influence the market. China introduced export licensing for gallium and germanium in August 2023 and tightened restrictions on shipments of these materials to the United States in December 2024, and it has expanded controls on other critical minerals since then. These measures do not cover glass directly but affect the wider semiconductor materials environment in which substrate makers plan. Japan and South Korea maintain their own export control lists aligned with multilateral regimes, which apply to some processing and inspection equipment used in glass core production.
Latin America and Middle East & Africa
Neither region has regulation aimed at advanced packaging substrates, and policy activity is focused on attracting assembly, test and data centre investment. Brazil's PADIS programme provides tax incentives for semiconductor and display activities. Costa Rica, which hosts an Intel assembly and test operation, was named in July 2023 as a partner under the U.S. International Technology Security and Innovation Fund, which supports semiconductor supply chain development in selected countries. In the Middle East, Saudi Arabia's Vision 2030 programme and the National Semiconductor Hub launched in 2024 target chip design and related capabilities, while the United Arab Emirates is building AI data centre capacity under national strategies that bring imported AI hardware into the region. For substrate suppliers, the most relevant rules in both regions are import regimes and U.S. export licensing conditions that apply to advanced AI accelerators shipped there.
For market participants, the practical consequence is that demand in these regions is shaped more by data centre and electronics investment rules than by manufacturing regulation. Import duties, local content provisions for electronics assembly and data localisation rules determine where servers and devices containing glass core packages are assembled and installed. Where U.S. export licences are required for advanced accelerators, the timing of licence approvals affects how quickly AI clusters are built, which in turn affects the pace of demand for the packages that use glass cores.
Industry Standards
Glass core substrates must meet the same reliability qualification that applies to other package substrates. JEDEC's JESD22 test methods, including JESD22-A104 for temperature cycling and JESD22-A110 for highly accelerated stress testing, and the joint IPC/JEDEC J-STD-020 standard for moisture and reflow sensitivity classification, are used by assemblers and chip designers to qualify packages. IPC standards such as IPC-6012 for rigid printed board qualification and the IPC-TM-650 test methods manual are commonly referenced for substrate-level testing, although they were written for organic materials and are being interpreted for glass. SEMI D24 specifies glass substrates for flat panel displays and provides a reference point for panel dimensions and glass quality, while industry groups in Korea, Japan and the United States were working during 2026 toward common specifications for glass core panel size, thickness and via geometry. The absence of a settled glass-specific standard is one reason qualification remains customer by customer.
Standardisation is also a competitive matter. Korean firms were reported in April 2026 to be accelerating commercialisation partly to influence material and format standards before alternative specifications become established, and panel-format choices made by consortia and pilot lines in Japan and Taiwan will influence which glass sizes become common. Until formal standards are issued, each buyer defines its own acceptance criteria for via quality, crack inspection, warpage and adhesion, which raises qualification costs for suppliers serving several customers.
Recent developments show the market moving from technology announcements toward capacity investment, partnerships and equipment orders. Between 2023 and 2024, activity centred on new glass core technologies from substrate makers, glass suppliers and IDMs. From 2025 onward, the emphasis shifted to pilot line construction, joint ventures, government-supported plants and capital raising to fund the transition to volume production, along with equipment orders for through-glass via processing.
14 Mar 2023: Dai Nippon Printing (DNP); Product Development; Developed a through-glass via (TGV) glass core substrate for semiconductor packages, designed as an alternative to resin cores for high-performance packages.
18 Sep 2023: Intel; Technology Announcement; Announced glass substrates for next-generation advanced packaging, with complete solutions targeted for the second half of the decade.
5 Jun 2024: Nippon Electric Glass; Product Launch; Introduced GC Core, a glass-ceramic core substrate that can be drilled with CO2 lasers without cracking, offered in low-dielectric, high-expansion and high-strength variants.
6 Dec 2024: Absolics (SKC); Expansion; U.S. Department of Commerce finalised up to USD 75 million in CHIPS incentives for Absolics' glass substrate facility in Covington, Georgia.
2 Apr 2025: LPKF Laser & Electronics; Partnership; Expanded cooperation with Onto Innovation to support high-volume glass core production, combining LIDE TGV processing with Firefly inspection at LPKF's Vitrion centre in Hannover.
10 Sep 2025: SCHOTT; Product Launch; Presented glass carrier wafers and glass panels for advanced chip packaging, including fan-out wafer- and panel-level packaging, at SEMICON Taiwan 2025.
12 Nov 2025: Samsung Electro-Mechanics; Partnership; Signed an MOU with Sumitomo Chemical Group to form a joint venture producing glass cores, based at Dongwoo Fine-Chem's Pyeongtaek site in South Korea.
1 Dec 2025: AGC; Product Launch; Announced its SEMICON Japan 2025 showcase of glass substrates with microvias for glass core applications and TGV glass substrates for co-packaged optics.
16 Dec 2025: TOPPAN; Expansion; Announced a pilot line at its Ishikawa Plant for glass cores, large glass interposers and organic RDL interposers, with commissioning targeted for July 2026.
12 May 2026: Absolics (SKC); Investment; SKC finalised a KRW 1.1671 trillion capital increase, of which KRW 589.6 billion is earmarked for the glass substrate business operated through Absolics.
20 May 2026: BOE Technology Group; Partnership; Signed a three-year MOU with Corning covering glass-based packaging substrates, foldable glass, perovskite glass substrates and optical interconnects.
4 Sep 2026: Absolics (SKC); Investment; SKC's board approved an investment of about KRW 281 billion in Absolics' rights offering to accelerate commercial glass substrate production.
23 Sep 2026: LPKF Laser & Electronics; Expansion; Received a letter of intent from a leading Asian advanced packaging manufacturer for NEXAR LIDE systems to ramp up its first glass substrate production facility.
Political
Political influence on this market is strong because glass core substrates sit inside the AI and high-performance computing supply chain that governments treat as strategic. The United States has used CHIPS incentives to place glass substrate capacity in Georgia and is supporting research through its packaging programme, while export controls in force since 2022 limit which customers can receive the most advanced accelerators. Japan, Korea, China, Taiwan and India each fund domestic packaging capability, which encourages duplicated regional capacity rather than a single global supply base. The national security investigation into semiconductor imports that the U.S. Department of Commerce opened under the Trade Expansion Act in April 2025 adds uncertainty about future tariffs on packaged chips and their content. Political alignment also shapes partnerships: Korean and Japanese suppliers have strengthened U.S. ties, and Chinese firms such as BOE are developing domestic sources.
Political risk also affects the location of new capacity. Suppliers planning plants weigh not only subsidies but also the stability of incentive programmes across changes of government, and several CHIPS award terms have been revisited since 2025. Relations between the United States and China influence whether Chinese glass substrate makers can sell to global AI chip designers, while close ties between the United States, Japan, South Korea and India have encouraged joint projects such as the 3D Glass Solutions plan in Odisha approved in August 2025.
Economic
The economics of the market are governed by heavy upfront investment and uncertain early volumes. A dedicated panel line requires several hundred million dollars, and suppliers carry the cost for years before revenue arrives; SKC's KRW 1.1671 trillion capital increase in May 2026, of which about KRW 589.6 billion was set aside for glass substrates, shows the scale of financing involved. Demand depends on capital spending by hyperscale cloud operators on AI infrastructure, which rose sharply through 2025 and 2026 but is cyclical and concentrated. Exchange rates matter because most substrate makers are in Korea and Japan while many buyers price in U.S. dollars. LG Innotek's January 2026 decision to defer large-scale commercialisation to 2030 on demand grounds illustrates how economic judgement, not technical readiness alone, sets the pace.
Financing structures are adapting to these conditions. Substrate makers rely on parent-group equity, government grants and customer co-investment rather than project debt alone, and joint ventures spread risk between partners that bring complementary assets, as in the case of a substrate designer pairing with a glass handling specialist. Equipment purchases are being staged so that capacity is added only as qualification milestones are reached, which reduces the risk of idle lines but can also slow supply response if demand accelerates.
Cost structure will also decide the pace of adoption beyond flagship AI products. Glass cores must approach the cost of advanced organic substrates for mainstream processors and consumer devices, which requires higher yields, larger panels and fuller utilisation of plants. Suppliers that share equipment platforms across glass and organic lines, or that can reuse display-industry glass handling assets, have a structural cost advantage during the transition.
Social
Social factors work mainly through skills and public expectations of digital services. Glass processing for semiconductors requires engineers who understand both glass science and substrate fabrication, a combination that is scarce; substrate makers in Korea, Japan and the United States compete for this talent, and university partnerships such as Georgia Tech's long-standing packaging research help fill the gap. Growth in generative AI use by consumers and businesses sustains the data centre build-out that drives early adoption. Community acceptance of new plants, including water use and chemical handling at sites such as Covington, Pyeongtaek and Bhubaneswar, is a further consideration in site selection and permitting.
Workforce development is becoming part of project planning. New facilities in Georgia, Odisha and Pyeongtaek are paired with training programmes and local hiring commitments, and governments increasingly link incentives to job creation. Public attention to the energy use of AI data centres may also shape how buyers present the benefits of new packaging technologies, with efficiency gains from denser packages and optical integration becoming part of the case for adoption.
Technological
Technology is the decisive factor. Glass offers flatness, stiffness, low dielectric loss and a thermal expansion that can be tuned close to silicon, which supports larger packages and finer interconnects than organic cores. The obstacles are equally technical: crack-free via formation, reliable copper adhesion to smooth glass, edge handling and inspection of transparent material. Progress during 2024–2026 has been steady, including Nippon Electric Glass's CO2-laser-drillable GC Core in June 2024, DNP's filled and conformal TGV cores in 2025, Intel's thick-core demonstration with embedded EMIB bridges in January 2026 and Absolics' move into yield stabilisation in 2026. Glass also enables optical waveguides for co-packaged optics, a capability that organic substrates cannot readily provide.
Competing technical routes remain open. Suppliers differ on whether to fill vias with copper or coat their walls, whether to embed components or silicon bridges in the glass core, and which glass family to use for a given package. Absolics' 2026 shift toward non-embedding designs for a communications chip customer, alongside its embedded programme, shows that companies are hedging across architectures. Equipment for inspecting transparent substrates and for handling larger panels is advancing in parallel, and the pace of progress in these supporting tools will influence how quickly yields reach commercial levels.
Environmental
Environmental considerations include energy use in glass melting, water and chemical consumption in etching and plating, and the handling of hydrofluoric acid and fluorinated process chemicals. Glass suppliers have committed to decarbonisation targets for their furnaces, and substrate makers face wastewater treatment requirements for fluoride and copper. The EU PFAS restriction proposal, updated in August 2025, could change the chemistries available for some dielectrics and process steps. Glass cores may also improve the energy efficiency of data centres indirectly by supporting denser packages and co-packaged optics that reduce electrical interconnect losses, and lower warpage can reduce assembly scrap.
Environmental performance is increasingly part of supplier selection. Hyperscale cloud operators publish emissions targets that extend to their hardware supply chains, and they ask component suppliers for data on energy, water and chemical use. Substrate makers that can demonstrate closed-loop water systems, recovery of etching chemicals and use of low-carbon electricity are better placed in such evaluations. Revisions to EU industrial emissions rules adopted in 2024 add pressure on glass furnaces in Europe to reduce emissions over the coming decade.
Legal
The legal environment centres on intellectual property, export control compliance and contract structures. Patent portfolios on via formation, metallisation and glass compositions are held by Intel, glass makers, equipment suppliers and Korean and Japanese substrate makers, and Intel has signalled interest in licensing its glass substrate patents, which may create licensing obligations for later entrants. Compliance with U.S. export controls and with China's own export control law of 2020 governs technology transfer and customer access. Product content laws such as RoHS and REACH apply to packages sold in Europe. Supply agreements with buyers typically include strict qualification, change-notification and liability terms, which shift risk to substrate makers during the early commercial phase.
Litigation risk is likely to grow as the market commercialises. Patent disputes over substrate and packaging technology have been common in the organic substrate sector, and the number of glass-related patent filings by Korean, Japanese, U.S. and Chinese companies has increased since 2023. Joint ventures and cross-border investments, such as the Samsung Electro-Mechanics joint venture with Dongwoo Fine-Chem in 2026, also require competition and foreign investment approvals, which can affect timelines. Suppliers therefore treat freedom-to-operate analysis and regulatory approvals as standard parts of capacity planning.
Profiles of 31 companies operating in the Glass Core Package Substrates Market market, including revenue, employee count, and market positioning where available.
Showing 31 of 31 companies
RTX occupies a structurally advantaged position that no other prime replicates: roughly half its revenue is commercial aerospace and half defence, giving it a natural hedge across two cycles that rarely peak together — and which, unusually, are peaking together in 2026. Collins Aerospace and Pratt & Whitney are entrenched on the installed base of the global narrowbody and widebody fleet, generating decades-long, high-margin aftermarket annuities. The Raytheon segment is the Western world's dominant supplier of ground-based air and missile defence effectors — Patriot, GEM-T, AMRAAM, Standard Missile, ESSM — precisely the munitions category that European rearmament and Middle East conflict have made scarce. A record $289 billion backlog at 30 June 2026, equal to roughly three years of sales, converts that positional advantage into unusual revenue visibility. The offsetting reality is that RTX carries $37 billion of debt, an $85 billion goodwill-and-intangible balance from the merger, and the unresolved cost tail of the GTF powder-metal remediation. RTX Corporation is the world's largest aerospace and defence company by revenue, and the only prime contractor that simultaneously holds franchise positions in commercial aircraft engines, commercial aerospace systems, and ground- and sea-based integrated air and missile defence. It was created in April 2020 by the merger of Raytheon Company with the aerospace businesses of United Technologies Corporation, and it renamed itself from Raytheon Technologies to RTX in July 2023 alongside a consolidation from four operating segments to three. --- ### What the company does RTX designs, manufactures, and services aerospace and defence systems for commercial airlines, aircraft OEMs, business aviation operators, the U.S. Government (principally the Department of Defense, latterly styled the Department of War in contract announcements), and allied governments worldwide. Its FY2025 Form 10-K describes the three segments as follows: Collins Aerospace provides advanced aerospace and defence products; Pratt & Whitney supplies aircraft engines; and Raytheon delivers defensive and offensive threat detection and mitigation capabilities. The company's independent characterisation is better expressed as three distinct economic engines bolted onto one balance sheet: 1. **An installed-base annuity business (Pratt & Whitney and, to a lesser degree, Collins).** Engines and nacelles are sold at or near cost — sometimes at a loss — to win position on an airframe, after which spare parts, overhauls, and long-term service agreements generate profit for twenty to thirty years. This is why Pratt & Whitney's reported segment margin (8.3% in FY2025) looks weak against Collins (16.2%) despite comparable revenue: Pratt is still absorbing original-equipment loss content on the GTF ramp while the aftermarket annuity has yet to reach maturity. 2. **A cost-plus and fixed-price government contracting business (Raytheon, plus Collins' defence lines).** Revenue is recognised over time on the percentage-of-completion basis, which makes reported margins highly sensitive to estimate-at-completion revisions. The FY2024 $575 million charge on a terminated foreign fixed-price development contract is the canonical illustration. 3. **A component and systems supply business (Collins).** Avionics, interiors, power management, and aerostructures sold to Airbus, Boeing, Embraer, Bombardier, and defence primes, with a large parts-and-repair aftermarket layered on top. ### Revenue model and mix | Metric | FY2025 | |---|---| | Commercial share of sales | 48% | | Defence share of sales | 52% | | Products share of sales | ~74% | | Services share of sales | ~26% | | Sales to U.S. Government (excl. FMS) | $33,279m (38% of net sales) | | Total international sales | $41,312m (47% of net sales) | | Total backlog | $268bn ($161bn commercial / $107bn defence) | | Backlog expected to convert within 12 months | ~25% | Sources: FY2025 Form 10-K Item 1 (U.S. government and international sales tables, backlog); RTX 2025 Annual Report sales-mix infographic; Q3 2025 disclosure for the product/service split. Note the structural shift: U.S. Government sales fell from 46% of revenue in FY2023 to 38% in FY2025 — not because U.S. volume declined (it rose from $31.6bn to $33.3bn) but because international and commercial revenue grew far faster. This is the single most important mix fact in the company today, because international direct commercial sales carry materially better margins than U.S. cost-type work, and because European air-defence procurement is the fastest-growing pool RTX addresses. ### Value chain position and customers RTX sits at the prime and Tier-1 layers simultaneously. On F-35 it is a major subsystem supplier (F135 propulsion via Pratt; sensors and avionics via Collins) to prime contractor Lockheed Martin — a direct competitor at the enterprise level. On Patriot and SPY-6 it is the prime. On A320neo it is a propulsion and nacelle supplier to Airbus, which in March 2026 was reported to be formally seeking damages from Pratt & Whitney over GTF disruption. This simultaneous supplier/competitor/counterparty posture across the same customer set is a defining feature of RTX's commercial relationships and a recurring source of litigation and negotiation risk. **End-markets served:** commercial air transport (OE and aftermarket); regional and business aviation; rotorcraft; military fixed-wing and rotary propulsion; integrated air and missile defence; naval combat systems; precision-guided munitions; space sensing and communications; airport and airline IT infrastructure; and government training and mission services.
### Identity and listing | Item | Detail | |---|---| | Entity profiled | Illinois Tool Works Inc. (exact legal-name match; active; publicly listed). The input classification "Public company" is confirmed | | Former names | None of significance disclosed. The company has operated as Illinois Tool Works since founding. Commonly abbreviated "ITW" | | Founded | 1912, Chicago, Illinois. Incorporated 1915 (Form 10-K FY2025) | | Jurisdiction of incorporation | Delaware, USA (Form 10-K FY2025) | | IRS Employer ID | 36-1258310 | | Headquarters | 155 Harlem Avenue, Glenview, Illinois 60025, USA. Tel. (847) 724-7500 | | Exchange / ticker | New York Stock Exchange: ITW (common stock) | | Other listed securities (NYSE) | Euro notes: 0.625% due 2027 (ITW27); 3.250% due 2028 (ITW28); 2.125% due 2030 (ITW30); 1.00% due 2031 (ITW31); 3.375% due 2032 (ITW32); 3.00% due 2034 (ITW34) | | ISIN / CUSIP | US4523081093 / 452308109 | | Fiscal year end | 31 December | | Index membership | S&P 500 constituent. Fortune 300 company (company description, 2026) | ### Scale and organisation | Item | Detail | |---|---| | Employees (latest) | About 43,000 at 31 Dec 2025; about 16,000 in the U.S. (Form 10-K FY2025) | | Employee trend | About 46,000 (FY2022 release); about 45,000 (FY2023); about 44,000 (FY2024 release); about 43,000 (FY2025). This is a steady decline driven by 80/20 simplification and productivity, not by revenue contraction | | Organisation | 88 divisions in 49 countries; about 410 plants and office facilities (Form 10-K FY2025) | | Auditor | Deloitte & Touche LLP. Ratification proposed for FY2026 (2026 Proxy) | | Holders of record | About 3,957 at 31 Jan 2026 | | Website | www.itw.com / investor.itw.com | ### Market data | Item | Detail | |---|---| | Shares outstanding | 288.2 million at 31 Jan 2026 (Form 10-K). About 284 million estimated at 30 Jun 2026, after 4.3 million shares were repurchased in H1 2026 (10-Q Q2 FY2026; derived) | | Market capitalisation (current) | About $82 billion. Basis: share price of roughly $288–$295 (5 Aug 2026 close $295.06; early-September 2026 dividend yield of 2.39% implies about $288) × about 284 million shares | | Market cap at 31 Dec 2025 | About $71 billion (2026 Proxy) | | Market cap discrepancies | Third-party aggregators show $71bn–$85bn depending on date. Live verification is recommended | | 52-week range | $238.82 – $303.16 (as of Aug 2026, aggregator data) | Illinois Tool Works is a 114-year-old, Glenview-based multi-industrial manufacturer with $16.0 billion of FY2025 revenue across seven segments: - Automotive OEM - Food Equipment - Test & Measurement and Electronics - Welding - Polymers & Fluids - Construction Products - Specialty Products ITW does not compete on scale or vertical integration. Its edge is a proprietary operating system, the "ITW Business Model," built on three elements: - **80/20 Front-to-Back management**, which concentrates resources on the largest, most profitable customers and products. - **Customer-Back Innovation (CBI)**, which develops products from customer pain points rather than from a central R&D lab. **A decentralised, entrepreneurial culture:** of 88 scaled-up divisions. Since launching its Enterprise Strategy in late 2012, ITW has lifted operating margin from 15.9% to 26.3% and after-tax ROIC from 14.5% to 29.3%. It has done this while shrinking revenue through divestiture of commoditised businesses (2026 Proxy). The "Next Phase" (2024–2030) pivots the agenda from margin expansion to sustained 4%+ organic growth, powered by a 3%+ CBI revenue yield. ITW is a Dividend King, with 63 consecutive annual dividend increases. --- ### Company's own description (Form 10-K FY2025, paraphrased) ITW describes itself as a global manufacturer of a diversified range of industrial products and equipment, organised into 88 divisions operating in 49 countries. Its seven reportable segments are grouped by similar product offerings and end markets. Products are distributed mainly direct to industrial manufacturers and through independent distributors. Backlog is not considered significant because delivery periods are short and inventory turns quickly. The company names its core competitive advantage as the ITW Business Model: - 80/20 Front-to-Back process - Customer-Back Innovation - Decentralised entrepreneurial culture Primary raw materials are steel, resins and chemicals, sourced from numerous commercial suppliers. ### Business model | Revenue type | Characterisation | Evidence | |---|---|---| | Product sales: consumables | Majority of revenue. Welding filler metals; Polymers & Fluids chemicals; fasteners; Hi-Cone carriers; marking inks; test consumables; contamination-control wipes | Segment product lists (10-K FY2025) | | Product sales: capital equipment | Welding power sources; food equipment; test systems (Instron, MTS); electronic assembly equipment; line automation | Segment product lists (10-K FY2025) | | Services | Food Equipment service, maintenance and repair (service organic growth +2.8% FY2025, +4.8% FY2024); aftermarket service in Test & Measurement | 10-K FY2025 Food Equipment discussion | | Software / subscription | Test & measurement software is embedded with equipment. Not reported separately | Not publicly disclosed | | Licensing | Not material / not disclosed | Not publicly disclosed | ITW's model rests on niche leadership in fragmented, technically demanding markets. Its businesses typically hold strong positions in specialised applications where: - the product is a small share of the customer's total cost but critical to performance (e.g., an automotive fastener, a weld wire, a test frame); and - differentiation comes from engineering, application know-how, brand and service. The 80/20 discipline continually prunes low-value SKUs and customers through Product Line Simplification (PLS). PLS deliberately reduced organic revenue by about 60 basis points in FY2024, about 60 bps in FY2025, and about 60 bps in H1 FY2026, in exchange for structurally higher margins (10-K FY2025; 10-Q Q2 FY2026). **Revenue model mix.** ITW does not report a formal product/service/subscription split. The analyst characterisation is: ### Value-chain position ITW sits as a Tier-1/Tier-2 component supplier (Automotive OEM, Specialty appliance components) and as an OEM of branded equipment and consumables (Welding, Food Equipment, Test & Measurement, Construction Products, Polymers & Fluids). It typically manufactures "in the market, for the market." This localisation was cited in FY2025 as the reason ITW could largely offset U.S. tariff costs through pricing and supply-chain actions (FY2025 release; 10-K FY2025). ### Customer types and end markets | Segment | Primary end markets (10-K FY2025) | Customer type | |---|---|---| | Automotive OEM | Automotive OEMs and tiers | Global and Chinese OEMs; Tier-1 suppliers | | Food Equipment | Food service, food retail, food institutional/restaurant | Restaurant chains, independents, institutions (healthcare, education), supermarkets | | Test & Measurement and Electronics | Electronics/semiconductor, general industrial, auto OEM/tiers, energy, industrial capital goods, consumer durables | R&D labs, quality labs, semiconductor fabs, electronics assemblers | | Welding | General industrial (fabrication, shipbuilding), construction, energy, MRO, capital goods, auto | Fabricators, contractors, OEMs; heavily via distributors | | Polymers & Fluids | Automotive aftermarket, general industrial, MRO | Retail auto-care, body shops, industrial maintenance | | Construction Products | Residential construction, renovation/remodel, commercial construction | Contractors, truss fabricators, big-box retail | | Specialty Products | Food and beverage, consumer durables, airlines, general industrial, capital goods, printing/publishing | Beverage packers, appliance OEMs, airports/airlines, packaging converters | ### Independent characterisation ITW is best understood as a portfolio of about 88 mid-sized, high-return niche franchises bound together by a common management system. Corporate allocates capital. Divisions run the business. Strengths of this structure: - A low-capital-intensity, cash-generative model. Capex was 2.6% of revenue in FY2025 ($419M on $16,044M), and after-tax ROIC is about 29–31%. - Demand is diversified across consumer, industrial and capex cycles. Weaknesses of this structure: - Organic growth has historically been modest (FY2023–FY2025 averaged roughly 0–2%). - PLS creates a built-in headwind to reported growth. - The company has unusually high exposure to Detroit-3 and European auto content, short-cycle construction, and the semiconductor capex cycle. The FY2026 data, with Q2 organic growth of +4.5% and double-digit growth in Welding and Test & Measurement, is the first meaningful evidence that the CBI-driven growth pivot may be gaining traction.
Dell Technologies is the world's largest branded server vendor by revenue and the third-largest personal computer vendor, and it is now the principal listed proxy for the migration of artificial-intelligence infrastructure from hyperscale cloud into enterprise, sovereign and neocloud data centres. Two reporting segments — Infrastructure Solutions Group and Client Solutions Group — generated $113.5bn of revenue in FY2026, and the business is running at an annualised revenue rate above $190bn in FY2027 on the strength of AI-optimised server demand. Dell's structural advantages are a direct-plus-channel go-to-market reaching customers in more than 170 countries, a supply chain that can integrate, liquid-cool and deploy rack-scale GPU systems at volume, an installed base served by a global support organisation, and a captive financing arm. Its structural constraints are thin hardware gross margins, a negative book equity position, high customer concentration in AI, and dependence on component suppliers whose pricing power currently exceeds its own. --- ### The company's own description In its FY2026 Form 10-K the Company describes itself as "a leader in the global technology industry focused on providing broad and innovative technology solutions for the data and artificial intelligence ('AI') era," with solutions that "range from client devices and peripherals to infrastructure solutions across servers, networking, and storage." It states that it designs, deploys and supports "secure, integrated solutions that extend from the edge to the core to the cloud," delivering "AI-optimized, software-defined, and cloud native infrastructure solutions across a broad partner ecosystem." The stated vision is "to become the most essential technology partner," executed by "leveraging our strengths to extend our leadership positions and capture new growth," anchored in a corporate purpose "to create technologies that drive human progress." ### Independent characterisation Dell is, at its economic core, a high-velocity systems integrator and distributor of other companies' silicon. It does not manufacture processors, GPUs, memory or flash; it buys them, engineers systems and racks around them, and monetises the assembly, integration, deployment, financing and multi-year support that surrounds them. This is a low-gross-margin, high-asset-turnover, negative-working-capital business model. In FY2026 consolidated gross margin was 20.0% and operating margin 7.2%, while asset turnover was approximately 1.25x and the current ratio 0.91 — Dell is funded in substantial part by its suppliers through $33.6bn of accounts payable at year end, rising to $49.7bn by 31 July 2026. Three characteristics distinguish the current business from the Dell of five years ago: **First, mix has inverted.** ISG overtook CSG as the larger segment in FY2026 ($60.8bn versus $51.0bn) and by Q2 FY2027 was more than twice CSG's size ($31.8bn versus $15.0bn). Within ISG, AI-optimised servers — a product category that did not exist as a separate disclosure line until Q4 FY2026 — generated $24.7bn in FY2026 and $32.5bn in the first half of FY2027 alone. **Second, the revenue model has bifurcated.** Product revenue grew 27% in FY2026 to $90.4bn while services revenue declined 4% to $23.1bn. The services decline is a reporting artefact of the wind-down of VMware resale and the disposal of Secureworks rather than a deterioration in attach rates; ISG and CSG services both grew. Nevertheless, the services line — historically the margin ballast of the business — is now only 20.4% of revenue, down from 25.3% in FY2025, and 12.5% of revenue in Q2 FY2027. Mix is moving away from Dell's most profitable revenue. **Third, consumption models have become material.** The Dell Payment Solutions portfolio offers utility, subscription, as-a-Service, lease, loan and immediate-pay structures. Dell Financial Services funded $11.9bn of originations in FY2026 and carried a $14.3bn global financing-receivables portfolio at year end. Financing receivables grew by $6.4bn in the first half of FY2027 alone, a direct consequence of large AI transactions carrying longer payment terms — this is why adjusted free cash flow ($11.3bn in H1 FY2027) diverges so sharply from unadjusted free cash flow ($4.1bn). ### Value chain position, customers and end markets Dell occupies the systems-integration and channel layer between component suppliers (NVIDIA, AMD, Intel, Broadcom, Micron, Samsung, SK Hynix, Western Digital, Seagate) and end customers. Manufacturing is a hybrid: Dell owns plants in the United States, Malaysia, China, Brazil, India, Poland and Ireland, and also uses contract manufacturers, principally in Asia, purchasing components and on-selling them to those manufacturers — an arrangement that generates large non-trade receivables and is disclosed as a credit-concentration risk. Customer segments are large global and national enterprises, government agencies and public institutions, educational institutions, healthcare organisations, small and medium businesses, and consumers. In FY2026 approximately 40% of net revenue was generated through channels other than the direct sales force — value-added resellers, systems integrators, distributors and retailers. Two customer cohorts now drive the growth narrative and both concentrate risk. The 10-K states plainly that AI solutions "have been purchased primarily by a small number of larger customers and cloud service providers," that large orders "may occur in some periods and not others," and that such transactions "may also involve larger amounts of credit or longer payment terms than have been typical for our business." Management has separately characterised the AI pipeline as a mix of "neocloud, sovereign and enterprise customers."
Company Headquarters: United States Founded: 1921 Workforce: ~7,500 Company Working: Master Lock Company LLC. is a global leader in the development and manufacturing of security products, including padlocks, combination locks, and other security solutions. Master Lock's product line includes a wide range of padlocks, safety lockout devices, digital locks, and other security solutions for residential, commercial, and industrial use. The company has a strong reputation for quality and durability, and its products are widely used in schools, hospitals, airports, and other high-security environments. In addition to its core product offerings, Master Lock provides services, including key cutting, lock repair, and customized security solutions for specific customer needs. The company is committed to innovation and strongly focuses on research and development to stay ahead of evolving security threats. Master Lock is owned by Fortune Brands innovations, a leading home and security products company that also owns other well-known brands such as Moen, Therma-Tru Doors, and Fiberon Decking.
84 interactive charts drawn from the Glass Core Package Substrates Market dataset — market size, each segment breakdown, and every region and country by segment. Open one to read its full data table and download it.
Global Glass Core Package Substrates Market By Region
Global Glass Core Package Substrates Market By Glass Material Type
Global Glass Core Package Substrates Market By Application
Global Glass Core Package Substrates Market By End User
Global Glass Core Package Substrates Market — North America by Country
Global Glass Core Package Substrates Market — North America by End User
Global Glass Core Package Substrates Market — North America by Application
Global Glass Core Package Substrates Market — North America by Glass Material Type
Global Glass Core Package Substrates Market — U.S. by End User
Global Glass Core Package Substrates Market — U.S. by Application
Global Glass Core Package Substrates Market — U.S. by Glass Material Type
Global Glass Core Package Substrates Market — Canada by End User
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